SOI Circuit Design Concepts, 2003. ,
Multi-gate SOI MOSFETs, Solid-State Electronics, pp.897-905, 2004. ,
Layout decomposition for double patterning lithography, 2008 IEEE/ACM International Conference on Computer-Aided Design, 2008. ,
DOI : 10.1109/ICCAD.2008.4681616
Algorithms of the VLSI layout decomposition, Vestn. Mosk. Gos. Tekh. Univ, vol.1, pp.76-87, 2011. ,
The Software for VLSI Layout Decomposition for Double Patterning, Program. Produkty Sist, vol.1, pp.7-10, 2011. ,
Features of Application of Computing Systems in Nanoengineering CADs, Vestn. Mosk. Gos. Tekh. Univ., spec. issue " Nanoinzheneriya " (Nanoengineering), pp.100-109, 2010. ,
Topological Transformation of Submicron VLSIs for Double Lithographical Mask Technology, Russian Microelectronics, vol.42, issue.6, pp.427-439, 2013. ,
Algorithm Design, 2006. ,
Impact of DFM and RET on Standard Cell Design Methodology, Proc. EDP Workshop, 2003. ,