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Autonomic Parallelism Adaptation on Software Transactional Memory

Naweiluo Zhou 1, 2, 3 Gwenaël Delaval 2, 3 Bogdan Robu 4 Éric Rutten 3 Jean-François Méhaut 2, 1
1 CORSE - Compiler Optimization and Run-time Systems
Inria Grenoble - Rhône-Alpes, LIG - Laboratoire d'Informatique de Grenoble
3 CTRL-A - Control for Autonomic computing systems
Inria Grenoble - Rhône-Alpes, LIG - Laboratoire d'Informatique de Grenoble
Abstract : Parallel programs need to manage the time trade-off between synchronization and computation. A high parallelism may decrease computing time but meanwhile increase synchronization cost among threads. Software Transactional Memory (STM) has emerged as a promising technique, which bypasses locks, to address synchronization issues through transactions. A way to reduce conflicts is by adjusting the parallelism, as a suitable parallelism can maximize program performance. However, there is no universal rule to decide the best parallelism for a program from an offline view. Furthermore, an offline tuning is costly and error-prone. Hence, it becomes necessary to adopt a dynamical tuning-configuration strategy to better manage a STM system. Autonomic computing offers designers a framework of methods and techniques to build autonomic systems with well-mastered behaviours. Its key idea is to implement feedback control loops to design safe, efficient and predictable controllers, which enable monitoring and adjusting controlled systems dynamically while keeping overhead low. We propose to design feedback control loops to automate the choice of parallelism level at runtime and diminish program execution time.
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Submitted on : Tuesday, March 22, 2016 - 4:43:47 PM
Last modification on : Wednesday, November 3, 2021 - 6:45:35 AM
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  • HAL Id : hal-01279599, version 2


Naweiluo Zhou, Gwenaël Delaval, Bogdan Robu, Éric Rutten, Jean-François Méhaut. Autonomic Parallelism Adaptation on Software Transactional Memory. [Research Report] RR-8887, Univ. Grenoble Alpes; INRIA Grenoble. 2016, pp.24. ⟨hal-01279599v2⟩



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