On the FPGA-based implementation of a flexible waveform from a high-level description: Application to LTE FFT case study

Abstract : The Field Programmable Gate Array (FPGA) technology is expected to play a key role in the development of Software Defined Radio (SDR) platforms. To this aim, leveraging the nascent High-Level Synthesis (HLS) tools, a design flow from high-level specifications to Register-Transfer Level (RTL) description can be thought to generate processing blocks that can be reconfigured at run-time. Based on such a flow, this paper describes the architectural exploration of a Fast Fourier Transform (FFT) for Long Term Evolution (LTE) standard. Synthesis results show the tradeoff between reconfiguration time and area that can be achieved with such an approach.
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Communication dans un congrès
EAI International Conference on Cognitive Radio Oriented Wireless Networks (Crowncom16), May 2016, Grenoble, France
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https://hal.inria.fr/hal-01302652
Contributeur : Matthieu Gautier <>
Soumis le : jeudi 14 avril 2016 - 17:09:39
Dernière modification le : mardi 20 février 2018 - 13:38:15
Document(s) archivé(s) le : mardi 15 novembre 2016 - 04:02:28

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  • HAL Id : hal-01302652, version 1

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Mai-Thanh Tran, Matthieu Gautier, Emmanuel Casseau. On the FPGA-based implementation of a flexible waveform from a high-level description: Application to LTE FFT case study. EAI International Conference on Cognitive Radio Oriented Wireless Networks (Crowncom16), May 2016, Grenoble, France. 〈hal-01302652〉

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