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Demo abstract : FPGA-based implementation of a flexible FFT dedicated to LTE standard

Abstract : Field Programmable Gate Array (FPGA) technology is expected to play a key role in the development of Software Defined Radio platforms. To reduce design time required when targeting such a technology, high-level synthesis tools can be used. These tools are available in current FPGA CAD tools. In this demo, we will present the design of a FFT component for Long Term Evolution standard and its implementation on a Xilinx Virtex 6 based ML605 board. Our flexible FFT can support FFT sizes among 128, 256, 512, 1024, 1536 and 2048 to compute OFDM symbols. The FFT is specified at a high-level (i.e. in C language). Both dynamic partial reconfiguration and run-time configuration based on input control signals of the flexible FFT will be shown. These two approaches provide interesting tradeoff between reconfiguration time and area.
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Poster communications
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https://hal.inria.fr/hal-01354992
Contributor : Emmanuel Casseau Connect in order to contact the contributor
Submitted on : Friday, November 4, 2016 - 2:09:42 AM
Last modification on : Saturday, June 25, 2022 - 7:43:39 PM
Long-term archiving on: : Sunday, February 5, 2017 - 12:10:25 PM

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Distributed under a Creative Commons Attribution - NoDerivatives 4.0 International License

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  • HAL Id : hal-01354992, version 1

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Mai-Thanh Tran, Emmanuel Casseau, Matthieu Gautier. Demo abstract : FPGA-based implementation of a flexible FFT dedicated to LTE standard. Conference on Design and Architectures for Signal and Image Processing (DASIP), Demo Night, Oct 2016, Rennes, France. , Conference on Design and Architectures for Signal and Image Processing (DASIP), Demo Night, pp.2, 2016. ⟨hal-01354992⟩

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