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An SMT-Based Approach to the Formal Analysis of MARTE/CCSL

Min Zhang 1 Frédéric Mallet 2, 3 Huibiao Zhu 1
2 AOSTE - Models and methods of analysis and optimization for systems with real-time and embedding constraints
CRISAM - Inria Sophia Antipolis - Méditerranée , Laboratoire I3S - COMRED - COMmunications, Réseaux, systèmes Embarqués et Distribués, Inria de Paris
Abstract : MARTE (abbreviated for Modeling and Analysis of Real-Time and Embedded systems) is a UML profile which provides a general modeling framework to design and analyze real-time embedded systems. CCSL (abbreviated for Clock Constraint Specification Language) is a formal language companion to MARTE, used to specify the constraints between the occurrences of events in real-time embedded systems. Many approaches have been proposed to the formal analysis of CCSL such as simulation and model checking. We propose in this paper an SMT-based approach to the formal analysis of CCSL. It is well-known that the SMT-based approach can effectively overcome the state-explosion problem for model checking, and can also be used for theorem proving. The latter feature allows us to prove the invalidity of CCSL constraints, which most of the existing approaches lack. We implement the proposed approach in a prototype tool clyzer on top of K framework and use Z3 as the underlying SMT solver.
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Submitted on : Wednesday, December 21, 2016 - 5:37:58 PM
Last modification on : Friday, January 21, 2022 - 3:16:45 AM
Long-term archiving on: : Tuesday, March 21, 2017 - 12:08:47 PM


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Min Zhang, Frédéric Mallet, Huibiao Zhu. An SMT-Based Approach to the Formal Analysis of MARTE/CCSL. Formal Methods and Software Engineering, Nov 2016, Tokyo, Japan. pp.433-449, ⟨10.1007/978-3-319-47846-3_27⟩. ⟨hal-01394677⟩



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