D. Grunwald, I. B. Charles, P. Morrey, M. Levis, K. I. Neufeld et al., Policies for dynamic clock scheduling, Proceedings of the 4th conference on Symposium on Operating System Design & Implementation, 2000.

M. Weiser, B. Welch, A. Demers, and S. Shenker, Scheduling for Reduced CPU Energy, Proceeding of the 1st USENIX conference on Operating Systems Design and Implementation, 1994.
DOI : 10.1007/978-0-585-29603-6_17

D. Qingyuan, D. Meisner, A. Bhattacharjee, T. F. Wenisch, and R. Bianchini, CoScale: Coordinating CPU and Memory System DVFS in Server Systems, Proceeding of the 45th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO) 2012, pp.143-154

T. S. Rosing, K. Mihic, and G. Micheli, Power and Reliability Management of SoCs Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol.15, pp.391-403, 2007.

Z. Lai, K. T. Lam, C. Wang, J. Su, Y. Yan et al., Latency-Aware Dynamic Voltage and Frequency Scaling on Many-Core Architectures for Data-Intensive Applications, 2013 International Conference on Cloud Computing and Big Data, 2013.
DOI : 10.1109/CLOUDCOM-ASIA.2013.68

J. Howard, S. Dighe, S. Vangal, G. Ruhl, N. Borkar et al., A 48-Core IA-32 Processor in 45 nm CMOS Using On-Die Message-Passing and DVFS for Performance and Power Scaling, IEEE Journal of Solid-State Circuits, vol.46, issue.1, pp.173-183, 2011.
DOI : 10.1109/JSSC.2010.2079450

S. Borkar, Thousand core chips, Proceedings of the 44th annual conference on Design automation, DAC '07, pp.746-749, 2007.
DOI : 10.1145/1278480.1278667

K. Ma, X. Li, M. Chen, and X. Wang, Scalable Power Control for Many-Core Architectures Running Multi-threaded Applications, Proceeding of ACM/IEEE International Symposium on Computer Architecture (ISCA), 2011.

M. Gamell, I. Rodero, M. Parashar, and R. Muralidhar, Exploring cross-layer power management for PGAS applications on the SCC platform, Proceedings of the 21st international symposium on High-Performance Parallel and Distributed Computing, HPDC '12, pp.235-246, 2012.
DOI : 10.1145/2287076.2287113

J. Haase, M. Damm, D. Hauser, and K. Waldschmidt, Reliability-Aware Power Management of Multi-Core Processors," in From Model-Driven Design to Resource Management for Distributed Embedded Systems, pp.205-214, 2006.

Y. Guo, D. Zhu, and H. Aydin, Reliability-Aware Power Management for Parallel Realtime Applications with Precedence Constraints, the Second International Green Computing Conference (IGCC), 2011.

Y. Guo, D. Zhu, and H. Aydin, Efficient Power Management Schemes for Dual-Processor Fault-Tolerant Systems, The First Workshop on Highly-Reliable Power-Efficient Embedded Designs (HARSH), 2013.