Exploiting Modern Manycore Architecture in Sparse Direct Solver with Runtime Systems

Abstract : Sparse direct solvers is a time consuming operation required by many scientific applications to simulate physical problems. By its important overall cost, many studies tried to optimize the time to solution of those solvers on multi-core and distributed architectures. More recently, many works have addressed heterogeneous architectures to exploit accelerators such as GPUs or Intel Xeon Phi with interesting speedup. Despite researches towards generic solutions to efficiently exploit those accelerators, their hardware evolution requires continual adaptation of the kernels running on those architectures. The recent Nvidia architectures, as Kepler, present a larger number of parallel units thus requiring more data to feed every computational units. A solution considered to supply enough computation has been to study problems with large number of small computations. The batched BLAS libraries proposed by Intel, Nvidia, or the University of Tennessee are examples of this solution. We discuss in this talk the use of the variable size batched matrix-matrix multiply to improve the performance of a the PaStiX sparse direct solver. Indeed, this kernel suits the supernodal method of the solver, and the multiple updates of variable sizes that occur during the numerical factorization. Performance results on a spectrum of matrices with different properties will be presented.
Type de document :
Communication dans un congrès
SIAM Conference on Computation Science and Engineering (CSE'17), Feb 2017, Atlanta, United States. 〈http://www.siam.org/meetings/cse17/〉
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https://hal.inria.fr/hal-01421383
Contributeur : Pierre Ramet <>
Soumis le : jeudi 22 décembre 2016 - 10:36:51
Dernière modification le : jeudi 13 décembre 2018 - 18:48:02

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  • HAL Id : hal-01421383, version 1

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Grégoire Pichon, Mathieu Faverge, Pierre Ramet. Exploiting Modern Manycore Architecture in Sparse Direct Solver with Runtime Systems. SIAM Conference on Computation Science and Engineering (CSE'17), Feb 2017, Atlanta, United States. 〈http://www.siam.org/meetings/cse17/〉. 〈hal-01421383〉

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