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Hard Real Time and Mixed Time Criticality on Off-The-Shelf Embedded Multi-Cores

Albert Cohen 1, 2, 3 Valentin Perrelle 2 Dumitru Potop-Butucaru 4 Marc Pouzet 3, 1 Elie Soubiran 2 Zhen Zhang 1, 2 
1 Parkas - Parallélisme de Kahn Synchrone
DI-ENS - Département d'informatique - ENS Paris, CNRS - Centre National de la Recherche Scientifique, Inria de Paris
4 AOSTE - Models and methods of analysis and optimization for systems with real-time and embedding constraints
CRISAM - Inria Sophia Antipolis - Méditerranée , Laboratoire I3S - COMRED - COMmunications, Réseaux, systèmes Embarqués et Distribués, Inria de Paris
Abstract : The paper describes a pragmatic solution to the parallel execution of hard real-time tasks on off-the-shelf embedded multiprocessors. We propose a simple timing isolation protocol allowing computational tasks to communicate with hard real-time ones. Excellent parallel resource utilization can be achieved while preserving timing compositionality. An extension to a synchronous language enables the correct-by-construction compilation to efficient parallel code. We do not explicitly address certification issues at this stage, yet our approach is designed to enable full system certification at the highest safety standards, such as SIL 4 in IEC 61508 or DAL A in DO-178B.
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Contributor : Albert Cohen Connect in order to contact the contributor
Submitted on : Tuesday, January 3, 2017 - 11:58:26 PM
Last modification on : Tuesday, October 25, 2022 - 4:17:25 PM
Long-term archiving on: : Tuesday, April 4, 2017 - 3:31:05 PM


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  • HAL Id : hal-01425887, version 1


Albert Cohen, Valentin Perrelle, Dumitru Potop-Butucaru, Marc Pouzet, Elie Soubiran, et al.. Hard Real Time and Mixed Time Criticality on Off-The-Shelf Embedded Multi-Cores. International Conference on Embedded and Real-Time Software and Systems (ERTS2), Jan 2016, Toulouse, France. ⟨hal-01425887⟩



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