High-Performance Wideband SDR Channelizers

Abstract : The essential process to analyze signals from multicarrier communication systems is to isolate independent communication channels using a channelizer. To implement a channelizer in software-defined radio systems, the Polyphase Filterbank (PFB) is commonly used. For real-time applications, the PFB has to process the digitized signal faster or equal to its sampling rate. Depending on the underlying hardware, PFB can run on a CPU, a Graphical Processing Unit (GPU), or even a Field-Programmable Gate Arrays (FPGA). CPUs and GPUs are more reconfigurable and scalable platforms than FPGAs. In this paper, we optimize an existing implementation of a CPU-based channelizer and implement a novel GPU-based channelizer. Our proposed solutions deliver an overall improvement of 30 % for the CPU optimization on Intel Core i7-4790 @ 3.60 GHz, and a 3.2-fold improvement for the GPU implementation on AMD R9 290, when compared to the original CPU-based implementation.
Keywords : SDR CPU GPU Channelizer
Type de document :
Communication dans un congrès
Lefteris Mamatas; Panagiotis Papadimitriou; Ibrahim Matta; Yevgeni Koucheryavy. 14th International Conference on Wired/Wireless Internet Communication (WWIC), May 2016, Thessaloniki, Greece. Lecture Notes in Computer Science, LNCS-9674, pp.3-14, 2016, Wired/Wireless Internet Communications. 〈10.1007/978-3-319-33936-8_1〉
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Islam Alyafawi, Arnaud Durand, Torsten Braun. High-Performance Wideband SDR Channelizers. Lefteris Mamatas; Panagiotis Papadimitriou; Ibrahim Matta; Yevgeni Koucheryavy. 14th International Conference on Wired/Wireless Internet Communication (WWIC), May 2016, Thessaloniki, Greece. Lecture Notes in Computer Science, LNCS-9674, pp.3-14, 2016, Wired/Wireless Internet Communications. 〈10.1007/978-3-319-33936-8_1〉. 〈hal-01434856〉

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