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A Failure Detector for HPC Platforms

Abstract : Building an infrastructure for exascale applications requires, in addition to many other key components, a stable and efficient failure detector. This paper describes the design and evaluation of a robust failure detector, that can maintain and distribute the correct list of alive resources within proven and scalable bounds. The detection and distribution of the fault information follow different overlay topologies that together guarantee minimal disturbance to the applications. A virtual observation ring minimizes the overhead by allowing each node to be observed by another single node, providing an unobtrusive behavior. The propagation stage is using a non uniform variant of a reliable broadcast over a circulant graph overlay network, and guarantees a logarithmic fault propagation. Extensive simulations, together with experiments on the Titan ORNL supercomputer, show that the algorithm performs extremely well and exhibits all the desired properties of an exascale-ready algorithm.
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Submitted on : Thursday, February 2, 2017 - 3:28:37 PM
Last modification on : Friday, November 18, 2022 - 9:23:15 AM
Long-term archiving on: : Friday, May 5, 2017 - 1:32:33 PM


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  • HAL Id : hal-01453086, version 1


George Bosilca, Aurélien Bouteiller, Amina Guermouche, Thomas Hérault, Yves Robert, et al.. A Failure Detector for HPC Platforms. [Research Report] RR-9024, INRIA. 2017. ⟨hal-01453086⟩



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