R. Dömer, A. Gerstlauer, and D. Gajski, SpecC Language Reference Manual Version 2.0 " http\

M. Fujita and H. Nakamura, The standard SpecC language, Proceedings of the 14th international symposium on Systems synthesis , ISSS '01, 2001.
DOI : 10.1145/500001.500019

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.16.5715

A. Habibi, H. Moinudeen, and S. Tahar, Generating Finite State Machines from SystemC, Design, Automation and Test in Europe, pp.76-81, 2006.
DOI : 10.1109/date.2006.243777

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.465.9128

A. Habibi and S. Tahar, An Approach for the Verification of SystemC Designs Using AsmL, Automated Technology for Verification and Analysis, p.6983, 2005.
DOI : 10.1007/11562948_8

P. Herber, J. Fellmuth, and S. Glesner, Model checking SystemC designs using timed automata, Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis, CODES/ISSS '08, 2008.
DOI : 10.1145/1450135.1450166

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.581.4194

P. Herber, M. Pockrandt, and S. Glesner, Transforming SystemC Transaction Level Models into UPPAAL timed automata, Ninth ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMPCODE2011), pp.161-170, 2011.
DOI : 10.1109/MEMCOD.2011.5970523

D. Karlsson, P. Eles, and Z. Peng, Formal Verification of SystemC Designs Using a Petri-Net Based Representation, Proceedings of the Design Automation & Test in Europe Conference, p.12281233, 2006.
DOI : 10.1109/DATE.2006.244076

C. Chou, Y. Ho, and C. Huan, Formal Deadlock Checking on High-Level SystemC Designs, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp.794-799, 2010.

C. Chou, Y. Ho, and C. Huan, Symbolic model checking on SystemC designs, Proceedings of the 49th Annual Design Automation Conference on, DAC '12, pp.327-333, 2012.
DOI : 10.1145/2228360.2228421

R. David and . Cok, The SMT-LIB v2 Language and Tools: A Tutorial