S. Borkar, Designing Reliable Systems from Unreliable Components: The Challenges of Transistor Variability and Degradation, IEEE Micro, vol.25, issue.6, pp.10-16, 2005.
DOI : 10.1109/MM.2005.110

E. Normand, Single event upset at ground level, IEEE Transactions on Nuclear Science, vol.43, issue.6, pp.2742-2750, 1996.
DOI : 10.1109/23.556861

P. Rech, Neutron-induced soft-errors in graphic processing units. 2012, IEEE Radiation Effects Data Workshop. (REDW '12) IEEE, p.pp

H. Esmaeizadeh, Dark silicon and the end of multicore scaling, ISCA '11: Proc. of the 38th Int. Symp. on Comp. Arch, pp.365-376, 2011.

P. C. Mehlitz and J. Penix, Expecting the Unexpected - Radiation Hardened Software, Infotech@Aerospace, 2005.
DOI : 10.2514/6.2005-7088

O. Goloubeva, M. Rebaudengo, M. S. Reorda, and M. Violante, Software-Implemented Hardware Fault Tolerance, 2006.

R. Vemu, S. Gurumurthy, and J. Abraham, ACCE: Automatic correction of control-flow errors, 2007 IEEE International Test Conference, pp.1-10, 2007.
DOI : 10.1109/TEST.2007.4437639

M. R. Guthaus, J. S. Ringenberg, D. Ernst, T. M. Austin, T. Mudge et al., MiBench: A free, commercially representative embedded benchmark suite, Proceedings of the Fourth Annual IEEE International Workshop on Workload Characterization. WWC-4 (Cat. No.01EX538), pp.3-14, 2001.
DOI : 10.1109/WWC.2001.990739

C. Lattner and V. Adve, LLVM: A compilation framework for lifelong program analysis & transformation, International Symposium on Code Generation and Optimization, 2004. CGO 2004., p.75, 2004.
DOI : 10.1109/CGO.2004.1281665

N. Krishnamurthy, V. Jhaveri, and J. A. Abraham, A design methodology for software fault injection in embedded systems, DCIA '98: Proc. of the Workshop on Dependable Computing and its applications

Z. Pan and R. Eigenmann, Fast and Effective Orchestration of Compiler Optimizations for Automatic Performance Tuning, Proceedings of the International Symposium on Code Generation and Optimization (CGO '06, pp.319-332, 2006.

K. Hoste and L. Eeckhout, Cole, Proceedings of the sixth annual IEEE/ACM international symposium on Code generation and optimization , CGO '08, pp.165-174, 2008.
DOI : 10.1145/1356058.1356080

S. S. Mukherjee, C. Weaver, J. Emer, S. K. Reinhardt, and T. Austin, A systematic methodology to compute the architectural vulnerability factors for a high-performance microprocessor, 22nd Digital Avionics Systems Conference. Proceedings (Cat. No.03CH37449), pp.29-41, 2003.
DOI : 10.1109/MICRO.2003.1253181

T. M. Jones, M. F. P-o-'boyle, and O. Ergin, Evaluating the Effects of Compiler Optimisations on AVF, Workshop on Interaction Between Compilers and Computer Architecture (INTERACT-12), 2008.

S. Bergaoui and R. Leveugle, Impact of Software Optimization on Variable Lifetimes in a Microprocessor-Based System, 2011 Sixth IEEE International Symposium on Electronic Design, Test and Application, pp.56-61, 2011.
DOI : 10.1109/DELTA.2011.20
URL : https://hal.archives-ouvertes.fr/hal-00643932

C. Argyrides, R. Ferreira, C. Lisboa, and L. Carro, Decimal hamming: a novel softwareimplemented technique to cope with soft errors, Proc. of the 26 th IEEE Int. Symp. on Defect and Fault Tolerance in VLSI and Nanotech. Sys., DFT '11. IEEE, pp.11-17, 2011.