, Analysis Towards Minimization of Total SRAM Energy Over Active and Idle Operating Modes. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol.19, issue.9, pp.1695-1703, 2011.
, Architectural Leakage-Aware Management of Partitioned Scratchpad Memories, 2007 Design, Automation & Test in Europe Conference & Exhibition, pp.1665-1670, 2007.
DOI : 10.1109/DATE.2007.364541
, Design Techniques and Architectures for Low-Leakage SRAMs. Circuits and Systems I: Regular Papers, IEEE Transactions on, vol.59, issue.9, 1992.
, ILP-Based energy minimization techniques for banked memories, ACM Transactions on Design Automation of Electronic Systems, vol.13, issue.3, pp.1-40, 2008.
DOI : 10.1145/1367045.1367059
, A Comprehensive Memory Modeling Tool and Its Application to the Design and Analysis of Future Memory Hierarchies, International Symposium on Computer Architecture, pp.51-62, 2008.
, SRAM leakage suppression by minimizing standby supply voltage, SCS 2003. International Symposium on Signals, Circuits and Systems. Proceedings (Cat. No.03EX720), pp.55-60, 2004.
, Low power design essentials, 2009.
DOI : 10.1007/978-0-387-71713-5
, Design of a Flexible Reactivation Cell for Safe Power-Mode Transition in Power-Gated Circuits, IEEE Transactions on Circuits and Systems I: Regular Papers, vol.56, issue.9, pp.1979-1993, 2009.
DOI : 10.1109/TCSI.2008.2010151
, Architectural Leakage Power Minimization of Scratchpad Memories by Application-Driven Sub-Banking, IEEE Transactions on Computers, 2010.
, COOJA/MSPSim: interoperability testing for wireless sensor networks, Proceedings of the Second International ICST Conference on Simulation Tools and Techniques, pp.1-7, 2009.
DOI : 10.4108/ICST.SIMUTOOLS2009.5637