J. Ram, M. A. Popovi?, and V. M. Stojanovi?, Single-chip microprocessor that communicates directly using light, Nature, vol.528, pp.534-538, 2015.

J. Psota, J. Miller, G. Kurian, H. Hoffman, N. Beckmann et al., ATAC: Improving performance and programmability with on-chip optical networks, Proceedings of 2010 IEEE International Symposium on Circuits and Systems, pp.3325-3328, 2010.
DOI : 10.1109/ISCAS.2010.5537892

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=

A. Shacham, K. Bergman, and L. P. Carloni, Photonic Networks-on-Chip for Future Generations of Chip Multiprocessors, IEEE Transactions on Computers, pp.1246-1260, 2008.
DOI : 10.1109/TC.2008.78

I. O. Connor, F. Mieyeville, F. Gaffiot, A. Scandurra, and G. Nicolescu, Reduction Methods for Adapting Optical Network on Chip Topologies to Specific Routing Applications, Proceedings of DCIS, 2008.

S. , L. Beux, J. Trajkovic, I. O. Connor, and G. Nicolescu, Layout guidelines for 3D architectures including Optical Ring Network-on-Chip (ORNoC), 2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, pp.242-247, 2011.
URL : https://hal.archives-ouvertes.fr/inria-00618605

P. Koka, M. O. Mccracken, H. Schwetman, C. O. Chen, X. Zheng et al., A micro-architectural analysis of switched photonic multi-chip interconnects, 39th Annual International Symposium on Computer Architecture, 2012.

A. Biberman, N. Sherwood-droz, X. Zhu, M. Lipson, and K. Bergman, High-Speed Data Transmission in Multi-Layer Deposited Silicon Photonics for Advanced Photonic Networks-on-Chip, CLEO:2011, Laser Applications to Photonic Applications, p.1, 2011.
DOI : 10.1364/CLEO_SI.2011.CThA1

R. Sun, M. Beals, A. Pomerene, J. Cheng, C. Hong et al., Impedance matching vertical optical waveguide couplers for dense high index contrast circuits, Optics Express, vol.16, issue.16, pp.11682-11690, 2008.
DOI : 10.1364/OE.16.011682

A. Parini, G. Calò, G. Bellanca, and V. Petruzzelli, Vertical link solutions for multilayer optical-networks-on-chip topologies, Optical and Quantum Electronics, vol.9, issue.3, pp.385-396, 2014.
DOI : 10.1007/s11082-013-9826-6

N. Sherwood-droz and M. Lipson, Scalable 3D dense integration of photonics on bulk silicon, Optics Express, vol.19, issue.18, 2011.
DOI : 10.1364/OE.19.017758

J. T. Bessette and D. Ahn, Vertically stacked microring waveguides for coupling between multiple photonic planes, Optics Express, vol.21, issue.11, pp.13580-13591, 2013.
DOI : 10.1364/OE.21.013580

G. Calò and V. Petruzzelli, Wavelength routers for multilayer integrated optical networks on chip, 2015 17th International Conference on Transparent Optical Networks (ICTON), 2015.
DOI : 10.1109/ICTON.2015.7193732

G. Calò and V. Petruzzelli, Generic Wavelength-routed Optical Router (GWOR) based on grating-assisted vertical couplers for multilayer optical networks, Optics Communications, vol.366, pp.99-106, 2016.
DOI : 10.1016/j.optcom.2015.12.027

L. Ramini, P. Grani, S. Bartolini, and D. Bertozzi, Contrasting Wavelength-Routed Optical NoC Topologies for Power-Efficient 3D-Stacked Multicore Processors Using Physical-Layer Analysis, Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013, pp.1589-1594, 2013.
DOI : 10.7873/DATE.2013.323

S. Pasricha and S. Bahirat, OPAL: A multi-layer hybrid photonic NoC for 3D ICs, 16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011), 2011.
DOI : 10.1109/ASPDAC.2011.5722211

D. Dang, B. Patra, and R. Mahapatra, A 2-layer laser multiplexed photonic network-on-chip, Sixteenth International Symposium on Quality Electronic Design, 2015.
DOI : 10.1109/ISQED.2015.7085458

K. Chen, H. Gu, Y. Yang, and D. Fan, A Novel Two-Layer Passive Optical Interconnection Network for On-Chip Communication, Journal of Lightwave Technology, vol.32, issue.9, 2014.
DOI : 10.1109/JLT.2014.2311119

L. Beux, H. Li, G. Nicolescu, J. Trajkovic, and I. O. Connor, Optical crossbars on chip, a comparative study based on worst-case losses, Concurrency and Computation: Practice and Experience, vol.2, issue.3, pp.2492-2503, 2014.
DOI : 10.1002/cpe.3336

URL : https://hal.archives-ouvertes.fr/hal-01243224

X. Zhang and A. Louri, A Multilayer Nanophotonic Interconnetcion Network for On-Chip Many-core Communication, Proceedings for DAC, 2010.

R. Morris, A. K. Kodi, and A. Louri, Dynamic Reconfiguration of 3D Photonic Networks-on-Chip for Maximizing Performance and Improving Fault Tolerance, 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture, 2012.
DOI : 10.1109/MICRO.2012.34

R. W. Morris, A. K. Kodi, A. Louri, and R. D. Whaley, Three-Dimensional Stacked Nanophotonic Network-on-Chip Architecture with Minimal Reconfiguration, IEEE Transactions on Computers, pp.243-255, 2014.
DOI : 10.1109/TC.2012.183

Y. Pan, J. Kim, and G. Memik, FlexiShare: Channel sharing for an energy-efficient nanophotonic crossbar, HPCA, 16 2010 The Sixteenth International Symposium on High-Performance Computer Architecture, 2010.
DOI : 10.1109/HPCA.2010.5416626

Z. Chen, H. Gu, Y. Yang, and D. Fan, A Hierarchical Optical Network-On-Chip Using Central-Controlled Subnet and Wavelength Assignment, Journal of Lightwave Technology, vol.32, issue.5, 2014.
DOI : 10.1109/JLT.2013.2294863

H. Li, S. L. Beux, G. Nicolescu, and I. O. Connor, Energy-efficient optical crossbars on chip with multi-layer deposited silicon, The 20th Asia and South Pacific Design Automation Conference, 2015.
DOI : 10.1109/ASPDAC.2015.7058996

URL : https://hal.archives-ouvertes.fr/hal-01243250

A. Biberman, K. Preston, G. Hendry, N. Sherwood-droz, J. Chan et al., Photonic network-on-chip architectures using multilayer deposited silicon materials for high-performance chip multiprocessors, ACM Journal on Emerging Technologies in Computing Systems, vol.7, issue.2, pp.1-725, 2011.
DOI : 10.1145/1970406.1970409

I. Loi, F. Angiolini, and L. Benini, Supporting vertical links for 3D networks-on-chip: toward an automated design and analysis flow, Proceedings of the Second International Conference on Nano-Networks, pp.1-5, 2007.
DOI : 10.4108/ICST.NANONET2007.2033

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=

J. V. Campenhout, L. Liu, P. R. Romeo, D. V. Thourhout, C. Seassal et al., A Compact SOI-Integrated Multiwavelength Laser Source Based on Cascaded InP Microdisks, IEEE Photonics Technology Letters, vol.20, issue.16, pp.1345-1347, 2008.
DOI : 10.1109/LPT.2008.926857

D. Vantrease, R. Schreiber, M. Monchiero, M. Mclaren, N. P. Jouppi et al., Corona, Proceedings of the 35th Annual International Symposium on Computer Architecture (ISCA), pp.153-164, 2008.
DOI : 10.1145/1394608.1382135

H. Li, A. Fourmigue, S. L. Beux, I. O. Connor, and G. Nicolescu, Towards Maximum Energy Efficiency in Nanophotonic Interconnects with Thermal-Aware On-Chip Laser Tuning, IEEE Transactions on Emerging Topics in Computing, p.2016
DOI : 10.1109/TETC.2016.2561623

URL : https://hal.archives-ouvertes.fr/hal-01330470

A. M. Jones, C. T. Derose, A. L. Lentine, D. C. Trotter, A. L. Starbuck et al., Ultra-low crosstalk, CMOS compatible waveguide crossings for densely integrated photonic interconnection networks, Optics Express, vol.21, issue.10, pp.12002-12013, 2013.
DOI : 10.1364/OE.21.012002

R. Schuster, A. Parini, and G. Bellanca, Parametric exploration of vertical tapered coupler for 3D optical interconnection, OPTICS workshop, 2015.
URL : https://hal.archives-ouvertes.fr/hal-01286922

Y. Huang, J. Song, X. Luo, T. Liow, and G. Lo, CMOS compatible monolithic multi-layer Si3N4-on-SOI platform for low-loss high performance silicon photonics dense integration, Optics Express, vol.22, issue.18, 2014.
DOI : 10.1364/oe.22.021859

W. D. Sacher, Y. Huang, G. Q. Lo, and J. K. Poon, Multilayer Silicon Nitride-on-Silicon Integrated Photonic Platforms and Devices, Journal of Lightwave Technology, vol.33, issue.4, pp.901-910, 2015.
DOI : 10.1109/JLT.2015.2392784

V. Donzella, S. T. Fard, and L. Chrostowski, Study of waveguide crosstalk in silicon photonics integrated circuits, Photonics North 2013
DOI : 10.1117/12.2042366

S. , L. Beux, J. Trajkovic, I. O-'connor, G. Nicolescu et al., Optical Ring Network-on-Chip (ORNoC): Architecture and design methodology, Proceedings of Design, Automation & Test in Europe (DATE'11), 2011.
URL : https://hal.archives-ouvertes.fr/inria-00618600

C. Sciancalepore, B. B. Bakir, C. Seassal, X. Letartre, J. Harduin et al., Thermal, Modal, and Polarization Features of Double Photonic Crystal Vertical-Cavity Surface-Emitting Lasers, IEEE Photonics Journal, vol.4, issue.2, pp.399-410, 2012.
DOI : 10.1109/JPHOT.2012.2189378

K. Ohira, K. Kobayashi, N. Iizuka, H. Yoshida, M. Ezaki et al., On-chip optical interconnection by using integrated III-V laser diode and photodetector with silicon waveguide, Optics Express, vol.18, issue.15, pp.15440-15447, 2010.
DOI : 10.1364/OE.18.015440

S. , L. Beux, J. Trajkovic, I. O-'connor, G. Nicolescu et al., Multi-Optical Network-on-Chip for Large Scale MPSoC, IEEE Embedded Systems Letters, pp.77-80, 2010.
URL : https://hal.archives-ouvertes.fr/inria-00618593

L. Ramini, D. Bertozzi, and L. P. Carloni, Engineering a Bandwidth-Scalable Optical Layer for a 3D Multi-core Processor with Awareness of Layout Constraints, 2012 IEEE/ACM Sixth International Symposium on Networks-on-Chip, 2012.
DOI : 10.1109/NOCS.2012.29

C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss et al., Building Manycore Processor-to-DRAM Networks with Monolithic Silicon Photonics, HOTI' 08, pp.21-30, 2008.
DOI : 10.1109/hoti.2008.11