The gem5 simulator, ACM SIGARCH Computer Architecture News, vol.39, issue.2, pp.1-7, 2011. ,
DOI : 10.1145/2024716.2024718
Exploring last n value prediction, 1999 International Conference on Parallel Architectures and Compilation Techniques (Cat. No.PR00425), pp.66-76, 1999. ,
DOI : 10.1109/PACT.1999.807407
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.4.8801
Selective Value Prediction, Computer Architecture Proceedings of the 26th International Symposium on (ISCA), pp.64-74, 1999. ,
DOI : 10.1109/isca.1999.765940
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.152.4915
Memory Dependence Prediction Using Store Sets, Proceedings of the 25th Annual International Symposium on Computer Architecture (ISCA). IEEE Computer Society, pp.142-153, 1998. ,
Dark Silicon and the End of Multicore Scaling, Proceedings of the 38th Annual International Symposium on Computer Architecture (ISCA '11, pp.365-376, 2011. ,
Speculative Execution based on Value Prediction, 1996. ,
Using value prediction to increase the power of speculative execution hardware, ACM Transactions on Computer Systems, vol.16, issue.3, pp.234-270, 1998. ,
DOI : 10.1145/290409.290411
Memory Address Prediction for Data Speculation, 1996. ,
Intel 64 and IA-32 Architectures Optimization Reference Manual, 2015. ,
Understanding Scheduling Replay Schemes, Software, IEE Proceedings-(HPCA). 198?209. DOI, 2004. ,
Exceeding the Dataflow Limit via Value Prediction, Proceedings of the 29th Annual ACM/IEEE International Symposium on Microarchitecture (MICRO). IEEE Computer Society, pp.226-237, 1996. ,
Value Locality and Load Value Prediction, SIGPLAN Not, vol.31, issue.9, pp.138-147, 1996. ,
ARM CTO: power surge could create 'dark silicon, p.17, 2009. ,
Best-offset hardware prefetching, 2016 IEEE International Symposium on High Performance Computer Architecture (HPCA), 2016. ,
DOI : 10.1109/HPCA.2016.7446087
URL : https://hal.archives-ouvertes.fr/hal-01254863
Global context-based value prediction, Proceedings Fifth International Symposium on High-Performance Computer Architecture, pp.4-12, 1999. ,
DOI : 10.1109/HPCA.1999.744311
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.363.9188
Architectural Simulators Considered Harmful, IEEE Micro, vol.35, issue.6, pp.4-12, 2015. ,
DOI : 10.1109/MM.2015.74
EOLE, Proceeding of the 41st Annual International Symposium on Computer Architecuture (ISCA), 2014. ,
DOI : 10.1145/2678373.2665742
URL : https://hal.archives-ouvertes.fr/hal-01193287
Practical data value speculation for future high-end processors, 2014 IEEE 20th International Symposium on High Performance Computer Architecture (HPCA), pp.428-439, 2014. ,
DOI : 10.1109/HPCA.2014.6835952
URL : https://hal.archives-ouvertes.fr/hal-01088116
BeBoP: A cost effective predictor infrastructure for superscalar value prediction, 2015 IEEE 21st International Symposium on High Performance Computer Architecture (HPCA), pp.13-25, 2015. ,
DOI : 10.1109/HPCA.2015.7056018
URL : https://hal.archives-ouvertes.fr/hal-01193175
EOLE: Toward a Practical Implementation of Value Prediction, IEEE Micro, vol.35, issue.3, pp.114-124, 2015. ,
DOI : 10.1109/MM.2015.45
URL : https://hal.archives-ouvertes.fr/hal-01193287
EOLE, ACM Transactions on Computer Systems, vol.34, issue.2, 2016. ,
DOI : 10.1145/2870632
URL : https://hal.archives-ouvertes.fr/hal-01193287
Using SimPoint for accurate and efficient simulation, ACM SIGMETRICS Performance Evaluation Review, vol.31, issue.1, pp.318-319, 2003. ,
DOI : 10.1145/885651.781076
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.10.6942
Probabilistic Counter Updates for Predictor Hysteresis and Stratification, The Twelfth International Symposium on High-Performance Computer Architecture, 2006., pp.110-120, 2006. ,
DOI : 10.1109/HPCA.2006.1598118
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.126.4085
The predictability of data values, Proceedings of 30th Annual International Symposium on Microarchitecture, pp.248-258, 1997. ,
DOI : 10.1109/MICRO.1997.645815
The performance potential of data dependence speculation and collapsing, Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture. MICRO 29, pp.238-247, 1996. ,
DOI : 10.1109/MICRO.1996.566465
A case for (partially) TAgged GEometric history length branch prediction, Journal of Instruction Level Parallelism, vol.8, pp.1-23, 2006. ,