Modeling of Syllogisms in Analog Hardware

Abstract : Syllogistic reasoning is modeled in analog hardware and some hardware models, i.e. syllogisms Baroco and Darii are presented. Chaining of syllogisms is modeled by using original min-max entities (circuits), “to see” whether the two rules, modeled in dedicated hardware, i.e., IF A THEN B and IF B THEN C imply the “hardware” rule IF A THEN C. The preliminaries include original min-max circuits based on operational amplifiers (Op-Amp), straight lines Op-Amp generators and different test circuits designed in Electronics WorkBench simulation environment and in real hardware. The “stage” to perform modeling is the phase plane.
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Lazaros Iliadis; Ilias Maglogiannis; Harris Papadopoulos. 8th International Conference on Artificial Intelligence Applications and Innovations (AIAI), Sep 2012, Halkidiki, Greece. Springer, IFIP Advances in Information and Communication Technology, AICT-381 (Part I), pp.443-452, 2012, Artificial Intelligence Applications and Innovations. 〈10.1007/978-3-642-33409-2_46〉
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Darko Kovacevic, Nikica Pribacic, Radovan Antonic, Asja Kovacevic, Mate Jovic. Modeling of Syllogisms in Analog Hardware. Lazaros Iliadis; Ilias Maglogiannis; Harris Papadopoulos. 8th International Conference on Artificial Intelligence Applications and Innovations (AIAI), Sep 2012, Halkidiki, Greece. Springer, IFIP Advances in Information and Communication Technology, AICT-381 (Part I), pp.443-452, 2012, Artificial Intelligence Applications and Innovations. 〈10.1007/978-3-642-33409-2_46〉. 〈hal-01521430〉

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