Communication Locality Analysis of Triplet-Based Hierarchical Interconnection Network in Chip Multiprocessor - Archive ouverte HAL Access content directly
Conference Papers Year : 2012

Communication Locality Analysis of Triplet-Based Hierarchical Interconnection Network in Chip Multiprocessor

(1, 2) , (1) , (1)
1
2

Abstract

Interconnection topology inside chip multiprocessor acts as fundamental role in communication locality. Considering compiler optimization data locality has been an inmost hypothesis in the high performance computing. Conversely, data locality sphere has several troubles when its degree of dimension is two or higher. In mesh network of two dimensions, each core is connected with its four neighbors. The data locality can potentially be exploited in two dimensions considering the specified processor’s perspective. A Triplet-Based Hierarchical Interconnection Network (TBHIN) has straightforward topology and fractal attribute for chip multiprocessor. In this paper, a static (no contention) performance analysis of TBHIN and 2-D mesh is presented, based on the premise of locality in communication. The dynamic (contention) software simulation of TBHIN shows that the stronger the locality in communication, the lower the delay of the communication.
Fichier principal
Vignette du fichier
978-3-642-35606-3_4_Chapter.pdf (253.76 Ko) Télécharger le fichier
Origin : Files produced by the author(s)
Loading...

Dates and versions

hal-01551366 , version 1 (30-06-2017)

Licence

Attribution - CC BY 4.0

Identifiers

Cite

Shahnawaz Talpur, Feng Shi, Yizhuo Wang. Communication Locality Analysis of Triplet-Based Hierarchical Interconnection Network in Chip Multiprocessor. 9th International Conference on Network and Parallel Computing (NPC), Sep 2012, Gwangju, South Korea. pp.33-41, ⟨10.1007/978-3-642-35606-3_4⟩. ⟨hal-01551366⟩
34 View
54 Download

Altmetric

Share

Gmail Facebook Twitter LinkedIn More