Compact Multiplicative Inverter for Hardware Elliptic Curve Cryptosystem

Abstract : This paper presents a compact design of a multiplicative inverter for elliptic curve cryptosystems. Using a methodology based on the composite field arithmetic, we propose a combinatorial solution to mitigate the usage of look up tables as commonly adopted by the conventional software based approach. In particular, we perform further isomorphism in the subfield, such that the required arithmetic are constructed using logical AND and XOR gates only. In this work, we demonstrate our proposed methodology with the field GF((28)41) ≅ GF((((22)2)2)41) in optimal normal type II basis. The chosen field is both secure and results in efficient computation. An analysis of the resultant hardware complexity of our inverter is reported towards the end.
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Communication dans un congrès
James J. Park; Albert Zomaya; Sang-Soo Yeo; Sartaj Sahni. 9th International Conference on Network and Parallel Computing (NPC), Sep 2012, Gwangju, South Korea. Springer, Lecture Notes in Computer Science, LNCS-7513, pp.492-499, 2012, Network and Parallel Computing. 〈10.1007/978-3-642-35606-3_58〉
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M. Wong, Ka Man. Compact Multiplicative Inverter for Hardware Elliptic Curve Cryptosystem. James J. Park; Albert Zomaya; Sang-Soo Yeo; Sartaj Sahni. 9th International Conference on Network and Parallel Computing (NPC), Sep 2012, Gwangju, South Korea. Springer, Lecture Notes in Computer Science, LNCS-7513, pp.492-499, 2012, Network and Parallel Computing. 〈10.1007/978-3-642-35606-3_58〉. 〈hal-01551382〉

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