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Appendix For the reader's convenience, we provide an example SystemVerilog code for SHA-1 used in the experiments with our toolkit In many cases a code strongly resembles a pseudocode defining a given cryptographic algorithm. A reader familiar with C or Java should have no trouble adjusting the code to our toolkit's needs. module sha1(IN, OUT); input [511:0] IN; // input here means 512-bit message block output ,