A. K?v?lc?m-co¸skunco¸skun, L. José, and .. Ayala, David Atienza, and Tajana Simunic Rosing Performance and Energy Evaluation of Memory Organizations in NoC-Based MPSoCs under Latency and Task Migration, p.56

G. Girão, D. Barcelos, and .. , and Flávio Rech Wagner Crosstalk Fault Tolerant NoC: Design and Evaluation, p.81

H. Alzemiro, A. M. Lucas, and F. G. Amory, Moraes From Assertion-Based Verification to Assertion-Based Synthesis, p.94

Y. Oddos-svm-method and .. , Katell Morin-Allory, and Dominique Borrione Power Macro-Modeling Using an Iterative LS, p.118

A. Multistep-extrapolated, S. Model-for-arbitrary-on-chip-interconnect-structures, and .. , 156 Petru B. Bacinschi and Manfred Glesner Techniques for Architecture Design for Binary Arithmetic Decoder Engines Based on Bitstream Flow Analysis, 181 Dieison Antonello Deprá and Sergio Bampi