R. 1. Bogliolo, L. Benini, and G. Micheli, Regression-based RTL power modeling, ACM Transactions on Design Automation of Electronic Systems, vol.5, issue.3, pp.337-372, 2000.
DOI : 10.1145/348019.348081
URL : http://chronos.stanford.edu/users/nanni/publications/archive/./2000/TODAESvol5iss3Jul00pg337.pdf

Z. Chen and K. Roy, A power macromodeling technique based on power sensitivity, Proceedings of the 35th annual conference on Design automation conference , DAC '98, pp.678-683, 1998.
DOI : 10.1145/277044.277216

S. Gupta and F. Najm, Power modeling for high-level power estimation, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, pp.18-29, 2000.
DOI : 10.1109/92.820758
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.42.9552

A. Gusmao, L. M. Silveira, and J. Monteiro, Parameter tuning in SVM-based power macro-modeling, 2009 10th International Symposium on Quality of Electronic Design, pp.135-140, 2009.
DOI : 10.1109/ISQED.2009.4810283

L. Hoegaerts, J. A. Suykens, J. Vandewalle, B. De, and . Moor, Primal space sparse kernel partial least squares regression for large scale problems, 2004 IEEE International Joint Conference on Neural Networks (IEEE Cat. No.04CH37541), p.563, 2004.
DOI : 10.1109/IJCNN.2004.1379970
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.2.8380

G. Jochens, L. Kruse, E. Schmidt, and W. Nebel, A new parameterizable power macro-model for datapath components, Europe Conference and Exhibition 1999. Proceedings, pp.29-36, 1999.
DOI : 10.1145/307418.307434

P. E. Landman and J. M. Rabaey, Architectural power analysis: The dual bit type method. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol.3, issue.2, pp.173-187, 1995.
DOI : 10.1109/92.386219
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.117.3307

E. Macii, M. Pedram, and F. Somenzi, High-level Power Modeling, Estimation, and Optimization, IEEE Transaction on Computer-Aided Design of Integrated Circuits and Systems, pp.1061-1079, 1998.
DOI : 10.1145/266021.266268
URL : http://atrak.usc.edu/~massoud/Papers/dac97-power-survey.pdf

D. Marculescu, R. Marculescu, and M. Pedram, Information theoretic measures of energy consumption at register transfer level, Proceedings of the 1995 international symposium on Low power design , ISLPED '95, pp.81-86, 1995.
DOI : 10.1145/224081.224096

F. Najm, Towards a high-level power estimation capability, Proceedings of the 1995 international symposium on Low power design , ISLPED '95, pp.87-92, 1995.
DOI : 10.1145/224081.224097
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.46.8834

A. Raghunathan, S. Dey, and N. K. Jha, High-level Macro-modeling and Estimation Techniques for Switching Activity and Power Consumption. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol.11, issue.4, pp.538-557, 2003.
DOI : 10.1109/tvlsi.2003.812295

W. Shang, S. Zhao, and Y. Shen, Application of LSSVM with AGA Optimizing Parameters to Nonlinear Modeling of SRM. Industrial Electronics and Applications, 3rd IEEE Conference on, pp.775-780, 2008.

C. Shannon, The Synthesis of Two-Terminal Switching Circuits, Bell System Technical Journal, vol.28, issue.1, pp.59-98, 1949.
DOI : 10.1002/j.1538-7305.1949.tb03624.x

G. Smits and E. Jordaan, Improved SVM regression using mixtures of kernels, Proceedings of the 2002 International Joint Conference on Neural Networks. IJCNN'02 (Cat. No.02CH37290), pp.2785-2790, 2002.
DOI : 10.1109/IJCNN.2002.1007589

J. Suykens, T. Van-gestel, J. De-brabanter, B. De, J. Moor et al., Least Squares Support Vector Machines, 2002.
DOI : 10.1142/5089

V. Vapnik, Statistical Learning Theory, 1998.

Q. Wu, Q. Qiu, M. Pedram, and C. Ding, Cycle-accurate macromodels for rt-level power analysis. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol.6, issue.4, pp.520-528, 1998.