A Hardware Accelerator for Real Time Sliding Window Based Pedestrian Detection on High Resolution Images

Abstract : Pedestrian detection has lately attracted considerable interest from researchers due to many practical applications. However, the low accuracy and high complexity of pedestrian detection has still not enabled its use in successful commercial applications. In this chapter, we present insights into the complexity-accuracy relationship of pedestrian detection. We consider the Histogram of Oriented Gradients (HOG) scheme with linear Support Vector Machine (LinSVM) as a benchmark. We describe parallel implementations of various blocks of the pedestrian detection system which are designed for full-HD (1920 × 1080) resolution. Features are improved by optimal selection of cell size and histogram bins which have been shown to significantly affect the accuracy and complexity of pedestrian detection. It is seen that with a careful choice of these parameters a frame rate of 39.2 fps is achieved with a negligible loss in accuracy which is 16.3x and 3.8x higher than state of the art GPU and FPGA implementations respectively. Moreover 97.14 % and 10.2 % reduction in energy consumption is observed to process one frame. Finally, features are further enhanced by removing petty gradients in histograms which result in loss of accuracy. This increases the frame rate to 42.7 fps (18x and 4.1x higher) and lowers the energy consumption by 97.34 % and 16.4 % while improving the accuracy by 2 % as compared to state of the art GPU and FPGA implementations respectively.
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Communication dans un congrès
23th IFIP/IEEE International Conference on Very Large Scale Integration - System on a Chip (VLSI-SoC), Oct 2015, Daejeon, South Korea. IFIP Advances in Information and Communication Technology, AICT-483, pp.46-66, 2016, VLSI-SoC: Design for Reliability, Security, and Low Power. 〈10.1007/978-3-319-46097-0_3〉
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Soumis le : mardi 29 août 2017 - 14:46:11
Dernière modification le : mercredi 3 janvier 2018 - 11:32:32

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Asim Khan, Muhammad Khan, Muhammad Bilal, Chong-Min Kyung. A Hardware Accelerator for Real Time Sliding Window Based Pedestrian Detection on High Resolution Images. 23th IFIP/IEEE International Conference on Very Large Scale Integration - System on a Chip (VLSI-SoC), Oct 2015, Daejeon, South Korea. IFIP Advances in Information and Communication Technology, AICT-483, pp.46-66, 2016, VLSI-SoC: Design for Reliability, Security, and Low Power. 〈10.1007/978-3-319-46097-0_3〉. 〈hal-01578617〉

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