Test Harness on a Preconditioned Conjugate Gradient Solver on GPUs: An Efficiency Analysis - Inria - Institut national de recherche en sciences et technologies du numérique Accéder directement au contenu
Communication Dans Un Congrès IEEE Transactions on Magnetics Année : 2013

Test Harness on a Preconditioned Conjugate Gradient Solver on GPUs: An Efficiency Analysis

Résumé

The parallelization of numerical simulation algorithms, i.e., their adaptation to parallel processing architectures, is an aim to reach in order to hinder exorbitant execution times. The parallelism has been imposed at the level of processor architectures and graphics cards are now used for general-purpose calculation, also known as " General-Purpose computation on Graphics Processing Unit (GPGPU) ". The clear benefit is the excellent performance over price ratio. Besides hiding the low level programming, software engineering leads to a faster and more secure application development. This paper presents the real interest of using GPU processors to increase performance of larger problems which concern electrical machines simulation. Indeed, we show that our auto-generated code applied to several models allows achieving speedups of the order of 10 .
Fichier principal
Vignette du fichier
06514785.pdf (433.91 Ko) Télécharger le fichier
Origine : Fichiers produits par l'(les) auteur(s)
Loading...

Dates et versions

hal-01581063 , version 1 (04-09-2017)

Identifiants

Citer

Antonio Wendell de Oliveira Rodrigues, Loïc Chevallier, Yvonnick Le Menach, Frédéric Guyomarch. Test Harness on a Preconditioned Conjugate Gradient Solver on GPUs: An Efficiency Analysis. CEFC - 2012, Nov 2012, Oita, Japan. pp.1729 - 1729, ⟨10.1109/TMAG.2013.2243830⟩. ⟨hal-01581063⟩
291 Consultations
115 Téléchargements

Altmetric

Partager

Gmail Facebook X LinkedIn More