G. Duc and R. Keryell, CryptoPage: An Efficient Secure Architecture with Memory Encryption, Integrity and Information Leakage Protection, 2006 22nd Annual Computer Security Applications Conference (ACSAC'06), pp.483-492, 2006.
DOI : 10.1109/ACSAC.2006.21

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=

B. Rogers, Y. Solihin, and M. Prvulovic, Memory predecryption, ACM SIGARCH Computer Architecture News, vol.33, issue.1, pp.27-33, 2005.
DOI : 10.1145/1055626.1055631

W. Shi, S. Hsien-hsin, M. Lee, C. Ghosh, A. Lu et al., High Efficiency Counter Mode Security Architecture via Prediction and Precomputation, Proceedings of the 32nd annual international symposium on Computer Architecture, ISCA '05, pp.14-24, 2005.
DOI : 10.1145/1080695.1069972

G. , E. Suh, D. Clarke, B. Gassend, M. Van-dijk et al., Efficient memory integrity verification and encryption for secure processors, Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture, p.339, 2003.
DOI : 10.1109/micro.2003.1253207

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=

J. Yang, Y. Zhang, and L. Gao, Fast secure processor for inhibiting software piracy and tampering, Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture, MICRO 36, p.351, 2003.

P. Rogaway, Efficient instantiations of tweakable blockciphers and refinements to modes ocb and pmac Advances in Cryptology -ASIACRYPT, Lecture Notes in Computer Science, vol.3329, pp.55-73, 2004.

E. Alyanaklan, The smart & secure world in 2020, 2007.

J. Daemen and V. Rijmen, The Block Cipher Rijndael, Proceedings of the The International Conference on Smart Card Research and Applications, pp.277-284, 2000.
DOI : 10.1007/10721064_26

A. Bogdanov, L. R. Knudsen, G. Leander, C. Paar, A. Poschmann et al., PRESENT: An Ultra-Lightweight Block Cipher, Proceedings of the 9th international workshop on Cryptographic Hardware and Embedded Systems, CHES '07, pp.450-466, 2007.
DOI : 10.1007/978-3-540-74735-2_31

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=

M. Liskov, R. L. Rivest, and D. Wagner, Tweakable Block Ciphers, Journal of Cryptology, vol.12, issue.11, pp.588-613, 2011.
DOI : 10.1007/3-540-68697-5_24

URL : https://link.springer.com/content/pdf/10.1007%2Fs00145-010-9073-y.pdf

D. J. Lie, Architectural support for copy and tamper-resistant software, p.3111747, 2004.

R. Elbaz, L. Torres, G. Sassatelli, P. Guillemin, M. Bardouillet et al., A parallelized way to provide data encryption and integrity checking on a processor-memory bus, Proceedings of the 43rd annual conference on Design automation , DAC '06, pp.506-509, 2006.
DOI : 10.1145/1146909.1147042

URL : https://hal.archives-ouvertes.fr/lirmm-00102783

R. Elbaz, D. Champagne, C. Gebotys, R. B. Lee, N. Potlapally et al., Hardware Mechanisms for Memory Authentication: A Survey of Existing Techniques and Engines, Transactions on Computational Science IV Lecture Notes in Computer ScienceLNCS), vol.47, pp.1-22, 2009.
DOI : 10.1109/HPCA.2008.4658636

URL : https://hal.archives-ouvertes.fr/lirmm-00372052

G. Leander, Small scale variants of the block cipher present. Cryptology ePrint Archive, Report, vol.143, 2010.

H. Li and Z. Friggstad, An efficient architecture for the aes mix columns operation, ISCAS (5), pp.4637-4640, 2005.

C. Paar, Efficient VLSI Architectures for Bit-Parallel Computation in Galois Fields, 1994.