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Combined Fault and Side-Channel Attack on Protected Implementations of AES

Abstract : The contribution of this paper is twofold: (1) a novel fault injection attack against AES, based on a new fault model, is proposed. Compared to state-of-the-art attacks, this fault model advantage is to relax constraints on the fault location, and then reduce the a priori knowledge on the implementation. Moreover, the attack algorithm is very simple and leaves room for optimization with respect to specific cases; (2) the fault attack is combined with side-channel analysis in order to defeat fault injection resistant and masked AES implementations. More precisely, our fault injection attack works well even when the attacker has only access to the faulty ciphertexts through a side-channel. Furthermore, the attacks presented in this paper can be extended to any SP-Network.
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https://hal.inria.fr/hal-01596307
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Thomas Roche, Victor Lomné, Karim Khalfallah. Combined Fault and Side-Channel Attack on Protected Implementations of AES. 10th Smart Card Research and Advanced Applications (CARDIS), Sep 2011, Leuven, Belgium. pp.65-83, ⟨10.1007/978-3-642-27257-8_5⟩. ⟨hal-01596307⟩

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