Design Methodology for an All CMOS Bandgap Voltage Reference Circuit

. The Internet of Thing (IoT) has given rise to the integration of smart systems in the industrial, healthcare, and social environments. These smart systems are often implemented by system-on-chip (SoC) solutions that require power management units, sensors, signal processors, and wireless interfaces. Hence, an independent voltage reference circuit is crucial for obtaining accurate measurements from the sensors and for the proper operation of the SoC. Making, bandgap circuits indispensable in these types of applications. Typically, bandgap circuits are implemented using bipolar transistors to generate two voltages with opposite temperature coefficients (Complementary To Absolute Temperature – CTAT; Proportional do Absolute Temperature - PTAT) which are added resulting in a temperature independent voltage reference. The disadvantage of using bipolar devices is that the power supply voltage must be larger than the ON base-emitter voltage, resulting in voltages larger than 0.7 V. The low power demands of IoT and of technology scaling, have forced lower values for the power supply voltage and thus new bandgap circuits using only CMOS transistors have gathered increased interest. In these, the MOS transistors operate in the weak inversion region where its current has an exponential relation with its gate-to-source voltage, as in the bipolar devices. Making it possible to generate both the PTAT and the CTAT voltages and thus produce a temperature independent voltage reference. This paper describes a design methodology of an all CMOS bandgap voltage reference circuit, in which one of the transistors works in the moderate region and the other in the weak inversion, to achieve the lowest possible voltage variation with temperature. The circuit produces a voltage reference of 0.45 V from a minimum power supply voltage of 0.6 V, with a total variation of 1.54 mV, over a temperature range of -40 to 100 ºC, resulting in a temperature coefficient of 24 ppm/ºC, and a power supply rejection ratio (PSRR) of -40 dB.


Introduction
Reference voltage generators are required in almost any Internet of Thing (IoT) System on Chip (SoC). To ensure the proper behavior of these systems, these reference voltages should be stable, independently of variations in: environment temperature, supply voltage, and fabrication process. The bandgap reference (BGR) is the most commonly voltage reference generator used [1]. Typically, a bandgap produces a constant reference voltage by summing two temperature dependent voltages -one Proportional to Absolute Temperature (PTAT) and the other Complementary to Absolute Temperature (CTAT). Most of the bandgaps uses the of a bipolar transistor to generate both CTAT and PTAT voltages [1][2] [3]. However, due to the technology scaling and the need to reduce power consumption, the supply voltage has been greatly reduced. At supply voltages bellow 1 V, bipolar transistors are not suitable since they need a minimum value of 0.7 V to be turned ON. Therefore, to keep pace with this decrease in the power supply several all CMOS bandgap reference voltage circuits have been proposed [4][5] [6][7] [8]. In these new topologies, the PTAT and CTAT voltages are generated by using a MOS transistor in the weak inversion (or subthreshold region). In this region the transistor current depends exponentially on the gate-to-source voltage ( ), similar to the bipolar transistor. This paper describes a complete design methodology and simulation test of an all CMOS bandgap, in order to achieve the best performance.

Relationship to Smart Systems
The smart systems together with IoT play an important role on the new generation of information technology and it is predicted to have a major impact in the human life in the near future. This relatively recent technology aims to enable things to be connected anytime, anywhere, with anything and anyone ideally using any path/network or service. Such systems must be small, low power, and durable, hence they are often implemented by SoC solutions, that contain power management units, sensors, signal processors, and wireless transceivers. All this circuits and sensor require constant reference voltages so that they can work properly and obtain accurate and precise measurements. Moreover, since smart systems can be placed in any kind of environment, these reference voltages must be stable and robust even in harsh environments where the temperature variation can be high.   1 shows the simplified schematic of the all CMOS bandgap voltage reference circuit [5], where the operational amplifier was implemented using a simple two stage miller compensated amplifier. The diode connected transistors operate in the weak inversion region where their current varies exponentially with . Thus, is given by (1) where is the technology current, is the substrate value, is the thermal voltage, and are the transistor length and width, and is the threshold voltage. For the 130 nm CMOS technology the value of and for an NMOS transistor were determined by simulation and are A, and 1.17, respectively.

Proposed Circuit and Design Methodology
(1) The transistors along with the resistances are responsible for the generation of a PTAT and CTAT current. The values of these currents can be derived by applying KCL to node n1 (2), where it is assumed that the amplifier gain is high so that , and that the current is equal in all the four branches of the circuit and so it can be derived through Ohm's law (3). (2) Considering and , then from (2) can be replaced by (1), resulting in (4) Replacing (4) and (3) in (2) results (5) Hence, the variation of over the temperature is given by (6) where . In order for to be constant its derivative must be equal to zero, where , in which is the Boltzmann constant ( J/K) and is the elementary charge ( ). By simulating a NMOS diode connected transistor biased by a current (Fig. 2). source it possible to determine the variation with temperature (Fig. 3). The current was set to 500 nA and , the temperature was swept from -40 to 100 ºC for different values ( m, m, , and m). As expected from (1) as decreases increases. Also, decreases with the increase in the temperature, i.e. it has a negative temperature coefficient like the bipolar transistors. For the chosen current and values, and knowing that V (extracted by simulation), then must be higher than 5 m to be in the moderate region ( ) or weak inversion ( ) using even higher values. Table 1 shows the slope, i.e. , for each value from Fig. 3. Using the value of Table 1 obtained through simulation for results in (7).

Fig. 2 Simplified schematic of the test bench to
determine .   The sizing of the resistors was performed using the same method used in [2]. Where the total resistance value was set according with the area constraints which resulted in a total resistance ( ) value of M . Then, at room temperature ( ), m mV, V, V, (for employing common centroid techniques), then

Simulation Results
In the theoretical analysis, it was assumed that both the current in and are equal. This is a rough approximation because the mirrored current of is divided between and . Therefore depends on and , which results in a transcendental equation without a closed-form solution. Hence, the theoretical resistance values were used as a starting point and the final values were optimized through simulation until a minimum had been achieved. In these adjustments, it was verified that by keeping closer to the moderate inversion region (i.e., ), the variation of over the temperature was greatly reduced than biasing in the weak inversion. Table 2 shows the final values of the transistors widths and lengths, the resistors and capacitors values. Where the capacitance is implemented by a MIM capacitor that can be placed on top of the bandgap resistors. Hence, its area was chosen to be equal to the total resistance area, resulting in a 20 pF capacitor

Conclusion
This paper described the analysis of an all CMOS bandgap voltage reference circuit. This analysis showed that, in order to minimize the temperature variation of the reference voltage value, it is better to bias one of the diode connected transistors of the bandgap in the moderation region instead than in the weak inversion region. From this analysis a complete step-by-step design methodology was develop and described in this paper. This methodology is based on first obtaining an initial guess for the sizes of the devices and the using Spectre simulations to adjust the sizing and thus optimize the circuit in order to obtain the lowest possible of over temperature.