Y. Xie, Modeling, architecture, and applications for emerging memory technologies . Design Test of Computers, IEEE, vol.28, issue.1, pp.44-51, 2011.
DOI : 10.1109/mdt.2011.20

M. K. Qureshi and V. Srinivasan, Scalable high performance main memory system using phase-change memory technology, ISCA '09, pp.24-33, 2009.
DOI : 10.1145/1555754.1555760

URL : http://cs.ucsb.edu/~chong/290N/pcm.pdf

L. E. Ramos and E. Gorbatov, Page placement in hybrid memory systems, Proceedings of the international conference on Supercomputing, ICS '11, pp.85-95, 2011.
DOI : 10.1145/1995896.1995911

URL : http://www.cs.rutgers.edu/~ricardob/papers/ics11.pdf

W. Zhang and T. Li, Exploring Phase Change Memory and 3D Die-Stacking for Power/Thermal Friendly, Fast and Durable Memory Architectures, 2009 18th International Conference on Parallel Architectures and Compilation Techniques, 2009.
DOI : 10.1109/PACT.2009.30

URL : http://survey-p-c-m.googlecode.com/svn-history/r3/trunk/Papers/selected/tmp/324-PACT-09.pdf

Y. Li and J. Choi, Managing hybrid main memories with a page-utility driven performance model, 2015.

G. Dhiman, R. Ayoub, and T. Rosing, PDRAM, Proceedings of the 46th Annual Design Automation Conference on ZZZ, DAC '09, pp.9-664, 2009.
DOI : 10.1145/1629911.1630086

H. Yoon, J. Meza, R. Ausavarungnirun, R. Harding, and O. Mutlu, Row buffer locality aware caching policies for hybrid memories, 2012 IEEE 30th International Conference on Computer Design (ICCD), pp.337-344, 2012.
DOI : 10.1109/ICCD.2012.6378661

URL : http://www.ece.cmu.edu/~safari/pubs/RBLA_ICCD12.pdf

S. Phadke and S. Narayanasamy, MLP aware heterogeneous memory system, 2011 Design, Automation & Test in Europe, pp.956-961, 2011.
DOI : 10.1109/DATE.2011.5763155

URL : http://www-personal.umich.edu/~sphadke/docs/mlp.pdf

A. M. Caulfield and J. Coburn, Understanding the impact of emerging nonvolatile memories on high-performance, io-intensive computing, In: SC, 2010.

S. M. Blackburn and K. S. Mckinley, Immix: a mark-region garbage collector with space efficiency, fast collection, and mutator performance, 2008.

S. Bock, B. R. Childers, R. G. Melhem, and D. Mossé, Concurrent page migration for mobile systems with OS-managed hybrid memory, Proceedings of the 11th ACM Conference on Computing Frontiers, CF '14, pp.1-3110, 2014.
DOI : 10.1145/2597917.2597924

S. Dulloor and A. Roy, Data tiering in heterogeneous memory systems, Proceedings of the Eleventh European Conference on Computer Systems, EuroSys '16, pp.1-1516, 2016.
DOI : 10.1145/2749469.2750401

D. Li and J. S. Vetter, Identifying opportunities for byte-addressable nonvolatile memory in extreme-scale scientific applications, pp.945-956, 2012.
DOI : 10.1109/ipdps.2012.89

W. Wei, D. Jiang, S. A. Mckee, J. Xiong, and M. Chen, Exploiting Program Semantics to Place Data in Hybrid Memory, 2015 International Conference on Parallel Architecture and Compilation (PACT), pp.163-173, 2015.
DOI : 10.1109/PACT.2015.10

X. Dong and Y. Xie, Simple but Effective Heterogeneous Main Memory with On-Chip Memory Controller Support, 2010 ACM/IEEE International Conference for High Performance Computing, Networking, Storage and Analysis, pp.1-11, 2010.
DOI : 10.1109/SC.2010.50

N. Chatterjee and M. Shevgoor, Leveraging Heterogeneity in DRAM Main Memories to Accelerate Critical Word Access, 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture, pp.13-24, 2012.
DOI : 10.1109/MICRO.2012.11

L. Liu, Y. Li, C. Ding, H. Yang, and C. Wu, Rethinking Memory Management in Modern Operating System: Horizontal, Vertical or Random?, IEEE Transactions on Computers, vol.65, issue.6, pp.1921-1935, 2016.
DOI : 10.1109/TC.2015.2462813

A. Hassan and H. Vandierendonck, Software-managed energy-efficient hybrid DRAM/NVM main memory, Proceedings of the 12th ACM International Conference on Computing Frontiers, CF '15, pp.1-238, 2015.
DOI : 10.1109/LES.2014.2325878

J. Malicevic and S. Dulloor, Exploiting NVM in large-scale graph analytics, Proceedings of the 3rd Workshop on Interactions of NVM/FLASH with Operating Systems and Workloads, INFLOW '15, pp.1-2, 2015.
DOI : 10.1007/978-3-540-68880-8_32

URL : https://infoscience.epfl.ch/record/211225/files/inflow-nvm-graphanalytics.pdf

G. Nakagawa and S. Oikawa, Preliminary Analysis of a Write Reduction Method for Non-volatile Main Memory on Jikes RVM, 2013 First International Symposium on Computing and Networking, pp.597-601, 2013.
DOI : 10.1109/CANDAR.2013.107

G. Nakagawa and S. Oikawa, An Analysis of the Relationship between a Write Access Reduction Method for NVM/DRAM Hybrid Memory with Programming Language Runtime Support and Execution Policies of Garbage Collection, 2014 IIAI 3rd International Conference on Advanced Applied Informatics, 2014.
DOI : 10.1109/IIAI-AAI.2014.128

G. Nakagawa and S. Oikawa, Language runtime support for NVM/DRAM hybrid main memory, 2014 IEEE COOL Chips XVII, pp.1-3, 2014.
DOI : 10.1109/CoolChips.2014.6842949

G. Nakagawa and S. Oikawa, NVM/DRAM hybrid memory management with language runtime support via MRW queue, 2015 IEEE/ACIS 16th International Conference on Software Engineering, Artificial Intelligence, Networking and Parallel/Distributed Computing (SNPD), pp.357-362, 2015.
DOI : 10.1109/SNPD.2015.7176226

H. Inoue and T. Nakatani, Identifying the sources of cache misses in java programs without relying on hardware counters, In: ISMM, ACM, pp.133-142, 2012.

F. T. Schneider, M. Payer, and T. R. Gross, Online optimizations driven by hardware performance monitoring, pp.373-382, 2007.
DOI : 10.1145/1250734.1250777

URL : http://www.lst.inf.ethz.ch/research/publications/publications/PLDI_2007/PLDI_2007.pdf

T. Yang, M. Hertz, E. D. Berger, S. F. Kaplan, and J. E. Moss, Automatic heap sizing, Proceedings of the 4th international symposium on Memory management , ISMM '04, pp.61-72, 2004.
DOI : 10.1145/1029873.1029881

M. Hertz, Y. Feng, and E. D. Berger, Garbage collection without paging, pp.143-153, 2005.
DOI : 10.1145/1065010.1065028

T. Yang, E. D. Berger, S. F. Kaplan, and J. E. Moss, CRAMM: virtual memory support for garbage-collected applications, pp.103-116, 2006.

T. Cao and S. M. Blackburn, The yin and yang of power and performance for asymmetric hardware and managed software, pp.225-236, 2012.

M. Ferdman and A. Adileh, Clearing the clouds: a study of emerging scale-out workloads on modern hardware, pp.37-48, 2012.

S. M. Blackburn and R. Garner, The dacapo benchmarks: java benchmarking development and analysis, pp.169-190, 2006.