Logic Synthesis of Control Automata, 1994. ,
DOI : 10.1007/978-1-4615-2692-6
Logic Synthesis for FSM-Based Control Units, 2009. ,
DOI : 10.1007/978-3-642-04309-3
Structural decomposition as a tool for the optimization of an FPGA-based implementation of a mealy FSM, Cybernetics and Systems Analysis, vol.54, issue.4, pp.313-322, 2012. ,
DOI : 10.1007/978-3-642-04309-3
EMB-based design of Mealy FSM, 12th IFAC Conference on Programmable Devices and Embedded Systems, pp.215-220, 2013. ,
Logic synthesis for FPGA-based Finite State Machines, Studies in Systems, Decision and Control, vol.38, pp.978-981, 2015. ,
DOI : 10.1007/978-3-319-24202-6
Synthesis for FPGAs with embedded memory blocks, Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field programmable gate arrays , FPGA '00, pp.75-82, 2000. ,
DOI : 10.1145/329166.329183
Area and speed oriented synthesis of FSMs for PAL-based CPLDs, Microprocessors and Microsystems, vol.36, issue.1, pp.45-61, 2012. ,
DOI : 10.1016/j.micpro.2011.06.004
ROM-Based Finite State Machine Implementation in Low Cost FPGAs, 2007 IEEE International Symposium on Industrial Electronics, pp.2342-2347, 2007. ,
DOI : 10.1109/ISIE.2007.4374972
Digital systems design with FPGAs and CPLDs, 2008. ,
Synthesis and Optimization of Digital Circuits, 1994. ,
FPGA-based decomposition of boolean functions . algorithms and implementation, Proc. of Sixth International Conference on Advanced Computer Systems, pp.502-509, 1999. ,
An application of functional decomposition in ROM-based FSM implementation in FPGA devices, Journal of System Architecture, vol.51, pp.6-7, 2005. ,
5 Logic Synthesis Method of Digital Circuits Designed for Implementation with Embedded Memory Blocks of FPGAs, Design of Digital Systems and Devices. LNEE 79, pp.121-144, 2011. ,
DOI : 10.1007/978-3-642-17545-9_5
Functional Decomposition with Application to FPGA Synthesis, 2001. ,
DOI : 10.1007/978-1-4757-3393-8
SIS: a system for sequential circuit synthesis, Berkely, 1992. ,
Synthesis and Implementation of RAM-Based Finite State Machines in FPGAs, pp.718-728, 2000. ,
DOI : 10.1007/3-540-44614-1_76
Low-power FSMs in FPGA: Encoding alternatives. In: Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation, pp.363-370, 2002. ,
Saving power by mapping finite-state machines into embedded memory blocks in FPGAs, Proceedings Design, Automation and Test in Europe Conference and Exhibition, pp.916-921, 2004. ,
DOI : 10.1109/DATE.2004.1269007