C. Thierry and B. Scherrer, Building Controllers for Tetris, ICGA Journal, vol.32, issue.1, pp.3-11, 2010.
DOI : 10.3233/ICG-2009-32102

R. Karp, Reducibility among combinatorial problems in Complexity of Computer Computations, ser. The IBM Research Symposia Series, pp.85-103, 1929.

T. Burd and R. Brodersen, Energy efficient CMOS micro-processor design, Hawaii International Conference on System Sciences, HICSS'95. Honolulu (HI), 1995.
DOI : 10.1109/hicss.1995.375385
URL : http://csdl.computer.org/comp/proceedings/hicss/1995/6930/00/69300288.pdf

D. Zhu, R. Melhem, and D. Mossé, The effects of energy management on reliability in real-time embedded systems, International Conference on Computer Aided Design, pp.35-40, 2004.

E. Elnozahy, M. Kistler, and R. Rajamony, Energy-Efficient Server Clusters, Workshop on Power-Aware Computing Systems, WPACS'02, pp.179-196, 2002.
DOI : 10.1007/3-540-36612-1_12
URL : http://researchweb.watson.ibm.com/arl/projects/papers/pacs-journal.pdf

I. Assayad, A. Girault, and H. Kalla, Tradeoff exploration between reliability, power consumption, and execution time for embedded systems -the TSH tricriteria scheduling heuristic, pp.229-245, 2013.

V. T. 'kindt and J. Billaut, Multicriteria Scheduling: Theory, Models and Algorithms, 2006.
URL : https://hal.archives-ouvertes.fr/hal-01067335

P. Van-stralen and A. Pimentel, Scenario-based design space exploration of MPSoCs, 2010 IEEE International Conference on Computer Design, pp.305-312, 2010.
DOI : 10.1109/ICCD.2010.5647727

S. Stuijk, M. Geilen, and T. Basten, A Predictable Multiprocessor Design Flow for Streaming Applications with Dynamic Behaviour, 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, pp.548-555, 2010.
DOI : 10.1109/DSD.2010.31
URL : http://alexandria.tue.nl/openaccess/Metis244420.pdf

S. Murali, M. Coenen, A. Radulescu, K. Goossens, and G. Micheli, A Methodology for Mapping Multiple Use-Cases onto Networks on Chips, Proceedings of the Design Automation & Test in Europe Conference, pp.118-123, 2006.
DOI : 10.1109/DATE.2006.244007

B. Yang, L. Guang, T. Xu, A. Yin, T. Santti et al., Multi-application multi-step mapping method for many-core network-on-chips, NORCHIP, pp.1-6, 2010.

A. Schranzhofer, J. Chen, and L. Thiele, Dynamic Power-Aware Mapping of Applications onto Heterogeneous MPSoC Platforms, IEEE Transactions on Industrial Informatics, vol.6, issue.4, pp.692-707, 2010.
DOI : 10.1109/TII.2010.2062192

J. Huang, A. Raabe, C. Buckl, and A. Knoll, A workflow for runtime adaptive task allocation on heterogeneous MPSoCs, 2011 Design, Automation & Test in Europe, pp.1-6, 2011.
DOI : 10.1109/DATE.2011.5763189

G. Mariani, P. Avasare, G. Vanmeerbeeck, C. Ykman-couvreur, G. Palermo et al., An industrial design space exploration framework for supporting run-time resource management on multi-core systems, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010), pp.196-201, 2010.
DOI : 10.1109/DATE.2010.5457211

A. K. Singh, A. Kumar, and T. Srikanthan, Accelerating throughput-aware runtime mapping for heterogeneous MPSoCs, ACM Transactions on Design Automation of Electronic Systems, vol.18, issue.1, pp.1-9, 2013.
DOI : 10.1145/2390191.2390200

C. Ykman-couvreur, P. Avasare, G. Mariani, G. Palermo, C. Silvano et al., Linking run-time resource management of embedded multi-core platforms with automated design-time exploration, IET Computers & Digital Techniques, vol.5, issue.2, pp.123-135, 2011.
DOI : 10.1049/iet-cdt.2010.0030