Circuits in Presence of Process Variations and Soft Errors, p.41 ,
Ali Afzali-Kusha, and Massoud Pedram Logic Synthesis for Silicon and Beyond-Silicon Multi-gate Pass-Logic Circuits, p.60 ,
Enrico Macii, and Massimo Poncino Digital Hardware Design Based on Metamodels and Model Transformations, p.83 ,
Improving the Efficiency of Formal Verification: The Case of Clock-Domain Crossings ,
Katell Morin-Allory, Shaker Sarwary, and Dominique Borrione Improving Stress Quality for SoC Using Faster-than-At-Speed Execution of Functional Programs, p.130 ,
Ernesto Sanchez, and Federico Venini Beyond Ideal DVFS Through Ultra-Fine Grain Vdd-Hopping, p.152 ,
Enrico Macii, and Massimo Alioto Earth Mover's Distance as a Comparison Metric for Analog Behavior, p.173 ,