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Reliability-aware energy optimization for throughput-constrained applications on MPSoC

Abstract : Multi-Processor System-on-Chip (MPSoC) has emerged as a promising embedded architecture to meet the increasing performance demand of embedded applications. However, due to limited energy budget, it is hard to guarantee that applications on MPSoC can be accomplished on time with a required throughput. The situation becomes even worse for applications with high reliability requirements, since extra energy will be inevitably consumed by task re-executions or duplicated tasks. Based on Dynamic Voltage and Frequency Scaling (DVFS) and task duplication techniques, this paper presents a novel energy-efficient scheduling model, which aims at minimizing the overall energy consumption of MPSoC applications under both throughput and reliability constraints. The problem is shown to be NP-complete, and several polynomial-time heuristics are proposed to tackle this problem. Comprehensive simulations on both synthetic and real application graphs show that our proposed heuristics can meet all the given constraints, while reducing the energy consumption.
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https://hal.inria.fr/hal-01766763
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Submitted on : Tuesday, April 17, 2018 - 7:33:53 PM
Last modification on : Wednesday, February 26, 2020 - 11:14:18 AM

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  • HAL Id : hal-01766763, version 2

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Changjiang Gou, Anne Benoit, Mingsong Chen, Loris Marchal, Tongquan Wei. Reliability-aware energy optimization for throughput-constrained applications on MPSoC. [Research Report] RR-9168, Laboratoire LIP, École Normale Supérieure de Lyon & CNRS & Inria, France; Shanghai Key Lab. of Trustworthy Computing, East China Normal University, China; Georgia Institute of Technology, USA. 2018, pp.1-35. ⟨hal-01766763v2⟩

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