A. Agarwal, Enable Polyhedral Optimizations in XLA through LLVM/Polly. Google Summer of Code 2017 final report, 2017.

R. Allen and K. Kennedy, Automatic Translation of FORTRAN Programs to Vector Form, Transactions on Programming Languages and Systems (TOPLAS), vol.9, pp.491-542, 1987.

R. Baghdadi, A. Cohen, S. Verdoolaege, and K. Trifunovi?, Improved Loop Tiling Based on the Removal of Spurious False Dependences, Transactions on Architecture and Code Optimization (TACO), vol.9, pp.1-52, 2013.
URL : https://hal.archives-ouvertes.fr/hal-00786674

V. Bandishti, I. Pananilath, and U. Bondhugula, Tiling Stencil Computations to Maximize Parallelism, International Conference for High Performance Computing, Networking, Storage and Analysis (SC), pp.1-11, 2012.

M. Baskaran, J. Ramanujam, and P. Sadayappan, Automatic C-to-CUDA code generation for affine programs, Compiler Construction, pp.244-263, 2010.

G. Somashekaracharya, U. Bhaskaracharya, A. Bondhugula, and . Cohen, Automatic Storage Optimization for Arrays, Transactions on Architecture and Code Optimization (TACO), vol.38, pp.1-11, 2016.

G. Somashekaracharya, U. Bhaskaracharya, A. Bondhugula, and . Cohen, SMO: An Integrated Approach to Intra-Array and InterArray Storage Optimization, Proceedings of the 43rd Annual ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages (POPL '16), pp.526-538, 2016.

U. Bondhugula, O. Gunluk, S. Dash, and L. Renganarayanan, A Model for Fusion and Code Motion in an Automatic Parallelizing Compiler, Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques (PACT '10), pp.343-352, 2010.

U. Bondhugula, A. Hartono, J. Ramanujam, and P. Sadayappan, A Practical Automatic Polyhedral Parallelizer and Locality Optimizer, SIGPLAN Notices, vol.43, pp.101-113, 2008.

G. J. Chaitin, M. A. Auslander, A. K. Chandra, J. Cocke, M. E. Hopkins et al., Register Allocation via Coloring, Computer Languages, vol.6, pp.47-57, 1981.

A. Darte, A. Isoard, and T. Yuki, Extended Lattice-Based Memory Allocation, Proceedings of the 25th International Conference on Compiler Construction, pp.218-228, 2016.
URL : https://hal.archives-ouvertes.fr/hal-01272969

P. Feautrier, Some Efficient Solutions to the Affine Scheduling Problem-Part I. One-dimensional Time, International Journal of Parallel Programming, vol.21, pp.313-347, 1992.

P. Feautrier, Some Efficient Solutions to the Affine Scheduling Problem-Part II. Multidimensional Time, International Journal of Parallel Programming, vol.21, pp.389-420, 1992.

P. Feautrier, Array Expansion, International Conference on Supercomputing 25th Anniversary Volume (SC '14, pp.99-111, 2014.
URL : https://hal.archives-ouvertes.fr/hal-01099746

T. Grosser, A. Grösslinger, and C. Lengauer, Polly-Performing Polyhedral Optimizations on a Low-Level Intermediate Representation, Parallel Processing Letters, vol.22, p.4, 2012.

K. Knobe and V. Sarkar, Array SSA Form and Its Use in Parallelization, Proceedings of the 25th ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages (POPL '98, pp.107-120, 1998.

M. Koch and J. Walter, , 2017.

D. J. Kuck, R. H. Kuhn, D. A. Padua, B. Leasure, and M. Wolfe, Dependence Graphs and Compiler Optimizations, Proceedings of the 8th ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages (POPL '81), pp.207-218, 1981.

V. Lefebvre and P. Feautrier, Automatic storage management for parallel programs, Parallel Comput, vol.24, pp.649-671, 1998.

Z. Li, Array Privatization: A Loop Transformation for Parallel Execution, 1992.

S. Mehta and P. Yew, Variable Liberalization. Transactions on Architecture and Code Optimization (TACO) 13, 3, Article 23, vol.23, pp.1-23, 2016.

R. Teja-mullapudi, V. Vasista, and U. Bondhugula, Polymage: Automatic Optimization for Image Processing Pipelines, SIGPLAN Notices, vol.50, pp.429-443, 2015.

I. Pananilath, A. Acharya, V. Vasista, and U. Bondhugula, An Optimizing Code Generator for a Class of LatticeBoltzmann Computations, Transactions on Architecture and Code Optimization (TACO), vol.12, p.14, 2015.

L. , N. Pouchet, and T. Yuki, , 2016.

F. Quilleré and S. Rajopadhye, Optimizing Memory Usage in the Polyhedral Model, Transactions on Architecture and Code Optimization (TACO), vol.22, pp.773-815, 2000.

K. Trifunovic, A. Cohen, D. Edelsohn, F. Li, T. Grosser et al., Graphite Two Years After: First Lessons learned from Real-World Polyhedral Compilation, GCC Research Opportunities Workshop (GROW '10), 2010.
URL : https://hal.archives-ouvertes.fr/inria-00551516

K. Trifunovic, A. Cohen, L. Razya, and F. Li, Elimination of Memory-Based Dependences for Loop-Nest Optimization and Parallelization, 3rd Workshop on GCC Research Opportunities (GROW '11), 2011.
URL : https://hal.archives-ouvertes.fr/hal-00992740

P. Vanbroekhoven, G. Janssens, M. Bruynooghe, and F. Catthoor, Transformation to Dynamic Single Assignment Using a Simple Data Flow Analysis, Programming Languages and Systems: Third Asian Symposium, pp.330-346, 2005.

N. Vasilache, B. Meister, A. Hartono, M. Baskaran, D. Wohlford et al., Trading Off Memory For Parallelism Quality, International Workshop on Polyhedral Compilation Techniques, 2012.

A. Venkat, M. Hall, and M. Strout, Loop and Data Transformations for Sparse Matrix Code, SIGPLAN Notices, vol.50, pp.521-532, 2015.

S. Verdoolaege, Presburger Formulas and Polyhedral Compilation, 2016.

S. Verdoolaege, J. C. Juega, A. Cohen, J. I. Gomez, C. Tenllado et al., Polyhedral Parallel Code Generation for CUDA, Transactions on Architecture and Code Optimization (TACO), vol.9, p.54, 2013.
URL : https://hal.archives-ouvertes.fr/hal-00786677

S. Verdoolaege and A. Cohen, Live Range Reordering, International Workshop on Polyhedral Compilation Techniques (IMPACT '16), 2016.
URL : https://hal.archives-ouvertes.fr/hal-01257224

K. Doran, S. Wilde, and . Rajopadhye, Allocating Memory Arrays for Polyhedra, 1993.