T. Alves, Trustzone: Integrated hardware and software security, 2004.

, ARM Limited. 2012. ARM Architecture Reference Manual. ARMv7-A and ARMv7-R edition. ARM Limited

T. Ball, B. Cook, V. Levin, . Sriram, and . Rajamani, SLAM and Static Driver Verifier: Technology transfer of formal methods inside Microsoft, International Conference on Integrated Formal Methods, 2004.

M. Bishop and M. Dilger, Checking for race conditions in file accesses, Computing systems, vol.2, issue.2, 1996.

M. Blanchou, Shattering Illusions in Lock-Free Worlds-Compiler and Hardware behaviors in OSes and VMs, Black Hat Briefings, 2013.

F. Brasser, U. Müller, A. Dmitrienko, K. Kostiainen, S. Capkun et al., Software Grand Exposure: SGX Cache Attacks Are Practical, WOOT, 2017.

C. Cadar, V. Ganesh, M. Peter, D. L. Pawlowski, D. Dill et al., EXE: automatically generating inputs of death, ACM Transactions on Information and System Security, 2008.

X. Cai, Y. Gui, and R. Johnson, Exploiting UNIX file-system races via algorithmic complexity attacks, S&P, 2009.

. George-j-carrette, CRASHME: Random input testing, 1996.

S. Chen, X. Zhang, M. K. Reiter, and Y. Zhang, Detecting Privileged Side-Channel Attacks in Shielded Execution with DéJà Vu, AsiaCCS, 2017.

. Ansi-technical-committee, . Iso/iec-jtc-1-working, and . Group, Rationale for international standard, Programming languages-C, 1999.

B. Copos and P. Murthy, Inputfinder: Reverse engineering closed binaries using hardware performance counters, 5th Program Protection and Reverse Engineering Workshop, 2015.

C. Cowan, S. Beattie, C. Wright, and G. Kroah-hartman, RaceGuard: Kernel Protection From Temporary File Race Vulnerabilities, USENIX Security Symposium, 2001.

M. Eddington, , 2008.

J. Erickson, M. Musuvathi, S. Burckhardt, and K. Olynyk, Effective Data-race Detection for the Kernel, OSDI, 2010.

C. Ferri, R. I. Bahar, M. Loghi, and M. Poncino, Energyoptimal synchronization primitives for single-chip multi-processors, 19th ACM Great Lakes symposium on VLSI, 2009.

C. Flanagan, N. Stephen, and . Freund, FastTrack: Efficient and Precise Dynamic Race Detection, Commun. ACM, 2010.

E. Justin, B. Forrester, and . Miller, An empirical study of the robustness of Windows NT applications using random testing, 4th USENIX Windows System Symposium, 2000.

V. Ganesh, T. Leek, and M. Rinard, Taint-based directed whitebox fuzzing, 31st International Conference on Software Engineering, 2009.

A. Gauthier, C. Mazin, J. Iguchi-cartigny, and J. Lanet, Enhancing fuzzing technique for OKL4 syscalls testing, Sixth International Conference on Availability, Reliability and Security, 2011.

Q. Ge, Y. Yarom, D. Cock, and G. Heiser, A Survey of Microarchitectural Timing Attacks and Countermeasures on Contemporary Hardware, Journal of Cryptographic Engineering, 2016.

P. Godefroid, Random testing for security: blackbox vs. whitebox fuzzing, 2nd International Workshop on Random Testing, 2007.

P. Godefroid, A. Kiezun, and M. Levin, Grammar-based whitebox fuzzing, ACM Sigplan Notices, vol.43, pp.206-215, 2008.

P. Godefroid, N. Klarlund, and K. Sen, DART: directed automated random testing, ACM Sigplan Notices, vol.40, pp.213-223, 2005.

P. Godefroid, Y. Michael, D. Levin, and . Molnar, SAGE: whitebox fuzzing for security testing, Queue, vol.10, p.20, 2012.

B. Goel, R. Titos-gil, A. Negi, A. Sally, P. Mckee et al., Performance and energy analysis of the restricted transactional memory implementation on haswell, IEEE IPDPS, 2014.

J. Götzfried, M. Eckert, S. Schinzel, and T. Müller, Cache Attacks on Intel SGX, 2017.

D. Gruss, C. Maurice, K. Wagner, and S. Mangard, Flush+Flush: A Fast and Stealthy Cache Attack, 2016.

D. Gruss, F. Schuster, O. Ohrimenko, I. Haller, J. Lettner et al., Strong and Efficient Cache Side-Channel Protection using Hardware Transactional Memory, USENIX Security Symposium, 2017.

L. Guan, J. Lin, B. Luo, J. Jing, and J. Wang, Protecting private keys against memory disclosure attacks using hardware transactional memory, S&P, 2015.

D. Gullasch, E. Bangerter, and S. Krenn, Cache GamesBringing Access-Based Cache Attacks on AES to Practice, S&P, 2011.
DOI : 10.1109/sp.2011.22

I. Haller, A. Slowinska, M. Neugschwandtner, and H. Bos, Dowsing for Overflows: A Guided Fuzzer to Find Buffer Boundary Violations, USENIX Security Symposium, 2013.

T. Harris, J. Larus, and R. Rajwar, Transactional memory, Synthesis Lectures on Computer Architecture, vol.5, pp.1-263, 2010.

. Intel, Intel Architecture Instruction Set Extensions Programming Reference, 2012.

. Intel, Intel 64 and IA-32 Architectures Optimization Reference Manual, 2017.

M. Jodeit and M. Johns, Usb device drivers: A stepping stone into your kernel, IEEE European Conference on Computer Network Defense, 2010.
DOI : 10.1109/ec2nd.2010.16

D. Jones, Trinity: A system call fuzzer, 13th Ottawa Linux Symposium, 2011.

M. Jurczyk and G. Coldwind, Identifying and exploiting windows kernel race conditions via memory access patterns, 2013.

U. Kargén and N. Shahmehri, Turning programs against each other: high coverage fuzz-testing using binary-code mutation and dynamic slicing, 10th Joint Meeting on Foundations of Software Engineering, 2015.

P. Koopman, J. Sung, C. Dingman, D. Siewiorek, and T. Marz, Comparing operating systems using robustness benchmarks, 16th Symposium on Reliable Distributed Systems, 1997.
DOI : 10.1109/reldis.1997.632800

URL : http://www.ece.cmu.edu/~koopman/ballista/srds97/preprint.pdf

D. Kuvaiskii, R. Faqeh, P. Bhatotia, P. Felber, and C. Fetzer, HAFT: Hardware-assisted fault tolerance, 2016.

K. , S. Lhee, and S. J. Chapin, Detection of file-based race conditions, International Journal of Information Security, vol.4, p.1, 2005.
DOI : 10.1007/s10207-004-0068-2

. Linaro, OP-TEE: Open Portable Trusted Execution Environment, 2016.

M. Lipp, D. Gruss, R. Spreitzer, C. Maurice, and S. Mangard, ARMageddon: Cache Attacks on Mobile Devices, USENIX Security Symposium, 2016.

Y. Liu, Y. Xia, H. Guan, B. Zang, and H. Chen, Concurrent and consistent virtual machine introspection with hardware transactional memory, IEEE International Symposium on High Performance Computer Architecture (HPCA), 2014.
DOI : 10.1109/hpca.2014.6835951

L. Martignoni, R. Paleari, G. Fresi-roglia, and D. Bruschi, Testing system virtual machines, 19th International Symposium on Software Testing and Analysis, 2010.
DOI : 10.1145/1831708.1831730

F. Mckeen, I. Alexandrovich, A. Berenzon, H. Carlos-v-rozas, V. Shafi et al., Innovative instructions and software model for isolated execution, HASP@ ISCA, 2013.

M. Mendonça and N. Neves, Fuzzing wi-fi drivers to locate security vulnerabilities, IEEE EDCC, 2008.

P. Barton, G. Miller, F. Cooksey, and . Moore, An empirical study of the robustness of macos applications using random testing, 1st International Workshop on Random Testing, 2006.

P. Barton, L. Miller, B. Fredriksen, and . So, An empirical study of the reliability of UNIX utilities, Commun. ACM, 1990.

P. Barton, D. Miller, C. Koski, V. Lee, R. Maganty et al., Fuzz revisited: A reexamination of the reliability of UNIX utilities and services, 1995.

M. , CWE-365: Race Condition in Switch, 2017.

A. Moghimi, G. Irazoqui, and T. Eisenbarth, CacheZoom: How SGX Amplifies The Power of Cache Attacks, 2017.

N. Komarov, Racehound: Data race detector for Linux kernel modules, 2015.

D. William, D. Norcott, and . Capps, IOzone filesystem benchmark, 2016.

A. Dag, A. Osvik, E. Shamir, and . Tromer, Cache Attacks and Countermeasures: the Case of AES, 2006.

M. Payer, . Thomas, and . Gross, Protecting applications against TOCTTOU races by user-space caching of file metadata, ACM SIGPLAN Notices, 2012.

E. Donald, . Porter, S. Owen, C. J. Hofmann, A. Rossbach et al., Operating system transactions, Proceedings of the ACM SIGOPS 22nd symposium on Operating systems principles, 2009.

E. Pozniansky and A. Schuster, Efficient On-the-fly Data Race Detection in Multithreaded C++ Programs, 2003.

E. Pozniansky and A. Schuster, MultiRace: Efficient On-the-fly Data Race Detection in Multithreaded C++ Programs: Research Articles, Concurr. Comput. : Pract. Exper, 2007.

V. Sanjay-rawat, A. Jain, L. Kumar, C. Cojocar, H. Giuffrida et al., Vuzzer: Application-aware evolutionary fuzzing, NDSS, 2017.

S. Savage, M. Burrows, G. Nelson, P. Sobalvarro, and T. Anderson, Eraser: A Dynamic Data Race Detector for Multithreaded Programs, ACM Transactions on Computer Systems, 1997.

B. Schwarz, H. Chen, D. Wagner, G. Morrison, J. West et al., Model checking an entire linux distribution for security violations, Computer Security Applications Conference, 2005.

M. Schwarz, S. Weiser, D. Gruss, C. Maurice, and S. Mangard, Malware Guard Extension: Using SGX to Conceal Cache Attacks, DIMVA, 2017.

J. Fermin and . Serna, MS08-061 : The case of the kernel mode double-fetch, 2008.

M. Shih, S. Lee, T. Kim, and M. Peinado, T-SGX: Eradicating controlled-channel attacks against enclave programs, NDSS, 2017.

N. Stephens, J. Grosen, C. Salls, A. Dutcher, R. Wang et al., Driller: Augmenting Fuzzing Through Selective Symbolic Execution, NDSS, 2016.

P. Uppuluri, U. Joshi, and A. Ray, Preventing race condition attacks on file-systems, ACM Symposium on Applied Computing, 2005.

D. Vyukov, syzkaller-linux syscall fuzzer, 2016.

P. Wang and J. Krinke, How Double-Fetch Situations turn into Double-Fetch Vulnerabilities: A Study of Double Fetches in the Linux Kernel, USENIX Security Symposium, 2017.

M. Vincent, D. Weaver, and . Jones, perf fuzzer: Targeted fuzzing of the perf_event_open() system call, 2015.

J. Wei and C. Pu, TOCTTOU Vulnerabilities in UNIX-style File Systems: An Anatomical Study, FAST, 2005.

N. Weichbrodt, A. Kurmus, P. Pietzuch, and R. Kapitza, AsyncShock: Exploiting synchronisation bugs in Intel SGX enclaves, ESORICS, 2016.

X. Xie and J. Xue, Acculock: Accurate and Efficient Detection of Data Races, CGO, 2011.

M. Xu, C. Qian, K. Lu, M. Backes, and T. Kim, Precise and Scalable Detection of Double-Fetch Bugs in OS Kernels, S&P, 2018.

Y. Xu, W. Cui, and M. Peinado, Controlled-Channel Attacks: Deterministic Side Channels for Untrusted Operating Systems, S&P, 2015.

Y. Yarom and K. Falkner, Flush+Reload: a High Resolution, Low Noise, L3 Cache Side-Channel Attack, USENIX Security Symposium, 2014.

C. J. Richard-m-yoo, K. Hughes, R. Lai, and . Rajwar, Performance evaluation of Intel® transactional synchronization extensions for highperformance computing, International Conference on High Performance Computing, Networking, Storage and Analysis, 2013.

Y. Yu, T. Rodeheffer, and W. Chen, RaceTrack: Efficient Detection of Data Race Conditions via Adaptive Tracking, SOSP, 2005.

G. Zacharopoulos, Employing Hardware Transactional Memory in, 2015.