D. Boneh, R. A. Demillo, and R. J. Lipton, On the Importance of Checking Cryptographic Protocols for Faults, Advances in Cryptology ? EUROCRYPT ?97, pp.37-51, 1997.

E. Biham, A fast new DES implementation in software, Fast Software Encryption, pp.260-272, 1997.

A. Tang, S. Sethumadhavan, and S. Stolfo, Motivating Security-Aware Energy Management, IEEE Micro, vol.38, issue.3, pp.98-106, 2018.

Y. Kim, R. Daly, J. Kim, C. Fallin, J. H. Lee et al., Flipping bits in memory without accessing them: An experimental study of DRAM disturbance errors, 2014 ACM/IEEE 41st International Symposium on Computer Architecture (ISCA), 2014.

M. Seaborn and T. Dullien, Stable Armenian dram cannot be guaranteed for long, Black Hat Briefings, 2015.

D. Gruss, M. Lipp, M. Schwarz, D. Genkin, J. Juffinger et al., Another Flip in the Wall of Rowhammer Defenses, 2018 IEEE Symposium on Security and Privacy (SP), 2018.

D. Gruss, C. Maurice, and S. Mangard, Rowhammer.js: A Remote Software-Induced Fault Attack in JavaScript, Detection of Intrusions and Malware, and Vulnerability Assessment, pp.300-321, 2016.
URL : https://hal.archives-ouvertes.fr/hal-01872588

Y. Xiao, X. Zhang, Y. Zhang, and R. Teodorescu, One bit flips, one cloud flops: Cross-vm row hammer attacks and privilege escalation, USENIX Security Symposium, 2016.

K. Razavi, B. Gras, E. Bosman, B. Preneel, C. Giuffrida et al., Flip feng shui: Hammering a needle in the software stack, USENIX Security Symposium, 2016.

S. Bhattacharya and D. Mukhopadhyay, Curious Case of Rowhammer: Flipping Secret Exponent Bits Using Timing Analysis, Lecture Notes in Computer Science, pp.602-624, 2016.

V. Van-der-veen, Y. Fratantonio, M. Lindorfer, D. Gruss, C. Maurice et al., Drammer, Proceedings of the 2016 ACM SIGSAC Conference on Computer and Communications Security, 2016.

A. Herdrich, E. Verplanke, P. Autee, R. Illikkal, C. Gianos et al., Cache QoS: From concept to reality in the Intel® Xeon® processor E5-2600 v3 product family, 2016 IEEE International Symposium on High Performance Computer Architecture (HPCA), 2016.

M. T. Aga, Z. B. Aweke, and T. Austin, When good protections go bad: Exploiting anti-DoS measures to accelerate rowhammer attacks, 2017 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), 2017.

Z. B. Aweke, S. F. Yitbarek, R. Qiao, R. Das, M. Hicks et al., ANVIL, ACM SIGPLAN Notices, vol.51, issue.4, pp.743-755, 2016.

R. Qiao and M. Seaborn, A new approach for rowhammer attacks, 2016 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), 2016.

O. Mutlu, The RowHammer problem and other issues we may face as memory becomes denser, Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017, 2017.

G. Irazoqui, T. Eisenbarth, and B. Sunar, MASCAT, Proceedings of the Eighth ACM Conference on Data and Application Security and Privacy, 2018.

N. Herath and A. Fogh, These are Not Your Grand Daddys CPU Performance Counters -CPU Hardware Performance Counters for Security, BlackHat US Briefings, 2015.

M. Payer, HexPADS: A Platform to Detect ?Stealth? Attacks, Lecture Notes in Computer Science, pp.138-154, 2016.

M. Chiappetta, E. Savas, and C. Yilmaz, Real time detection of cache-based side-channel attacks using hardware performance counters, Applied Soft Computing, vol.49, pp.1162-1174, 2016.

T. Zhang, Y. Zhang, and R. B. Lee, CloudRadar: A Real-Time Side-Channel Attack Detection System in Clouds, Research in Attacks, Intrusions, and Defenses, pp.118-140, 2016.

F. Brasser, L. Davi, D. Gens, C. Liebchen, and A. Sadeghi, CAn't touch this: Software-only mitigation against Rowhammer attacks targeting kernel memory, USENIX Security Symposium, 2017.

D. Kim, P. J. Nair, and M. K. Qureshi, Architectural Support for Mitigating Row Hammering in DRAM Memories, IEEE Computer Architecture Letters, vol.14, issue.1, pp.9-12, 2015.

M. Ghasempour, A. Jaleel, J. D. Garside, and M. Luján, HAPPY, Proceedings of the Second International Symposium on Memory Systems, 2016.

A. Tatar, C. Giuffrida, H. Bos, and K. Razavi, Defeating Software Mitigations Against Rowhammer: A Surgical Precision Hammer, Research in Attacks, Intrusions, and Defenses, pp.47-66, 2018.

P. Pessl, D. Gruss, C. Maurice, M. Schwarz, and S. Mangard, DRAMA: Exploiting DRAM Addressing for Cross-CPU Attacks, USENIX Security Symposium, 2016.

D. Kaseridis, J. Stuecheli, and L. K. John, Minimalist open-page, Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture - MICRO-44 '11, 2011.

J. M. Dodd, Contents Page, Journal of Management, vol.29, issue.6, p.i, 2003.

M. Awasthi, D. W. Nellans, R. Balasubramonian, and A. Davis, Prediction Based DRAM Row-Buffer Management in the Many-Core Era, 2011 International Conference on Parallel Architectures and Compilation Techniques, 2011.

X. Shen, F. Song, H. Meng, S. An, and Z. Zhang, RBPP: A row based DRAM page policy for the many-core era, 2014 20th IEEE International Conference on Parallel and Distributed Systems (ICPADS), 2014.

S. Kareenahalli, Z. B. Bogin, and M. D. Shah, Timer Device, 2020.

C. H. Teh, S. Kareenahalli, and Z. Bogin, Dynamic update adaptive idle timer, 2006.

P. Frigo, C. Giuffrida, H. Bos, and K. Razavi, Grand Pwning Unit: Accelerating Microarchitectural Attacks with the GPU, 2018 IEEE Symposium on Security and Privacy (SP), 2018.

D. Gruss, C. Maurice, K. Wagner, and S. Mangard, Flush+Flush: A Fast and Stealthy Cache Attack, Detection of Intrusions and Malware, and Vulnerability Assessment, pp.279-299, 2016.

J. Wei, S. Xu, and D. Li, A Low Power Up/Down Double-Data-Rate Counter for CMOS Image Sensors, 2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC), 2019.

M. Azure, High performance compute VM sizes, 2018.

L. Cojocar, K. Razavi, C. Giuffrida, and H. Bos, Exploiting Correcting Codes: On the Effectiveness of ECC Memory Against Rowhammer Attacks, 2019 IEEE Symposium on Security and Privacy (SP), 2019.

P. Frigo, E. Vannacc, H. Hassan, V. V. Der-veen, O. Mutlu et al., TRRespass: Exploiting the Many Sides of Target Row Refresh, 2020 IEEE Symposium on Security and Privacy (SP), 2020.

Y. Yarom and K. Falkner, Flush+Reload: a High Resolution, Low Noise, L3 Cache Side-Channel Attack, USENIX Security Symposium, 2014.

M. Lipp, D. Gruss, R. Spreitzer, C. Maurice, and S. Mangard, ARMageddon: Cache Attacks on Mobile Devices, USENIX Security Symposium, 2016.

. Intel, Intel 64 and IA-32 Architectures Software Developer's Manual, vol.3, 2019.

. Intel, Improving real-time performance by utilizing cache allocation technology: Enhancing performance via allocation of the processor's cache, 2015.

. Hetzner, Dedicated root server hosting, 2018.

D. Hosting, Select Fully Managed Dedicated Server Hosting With Affordable Prices

S. B. Hosting, Select Fully Managed Dedicated Server Hosting With Affordable Prices

, Dedicated Servers, 2010.

. Intel, Intel Xeon Phi Processor High Performance Programming, 2016.

I. and Q. Technologies, Qualcomm snapdragon 600e processor apq8064e: Recommended memory controller and device settings, 2016.

A. Arm, Architecture Reference Manual ARMv8. ARM Limited, 2013.

T. M. Zeng, The android ion memory allocator, 2012.

Y. Jang, J. Lee, S. Lee, and T. Kim, SGX-Bomb, Proceedings of the 2nd Workshop on System Software for Trusted Execution - SysTEX'17, 2017.

A. Dinaburg, DNS Hijacking, BlackHat US Briefings, pp.377-397, 2020.

Y. Liu, W. Tome, L. Zhang, D. Choffnes, D. Levin et al., An End-to-End Measurement of Certificate Revocation in the Web's PKI, Proceedings of the 2015 ACM Conference on Internet Measurement Conference - IMC '15, 2015.

P. Mutton, Certificate Revocation

J. A. Muir, Seifert?s RSA Fault Attack: Simplified Analysis and Generalizations, Information and Communications Security, pp.420-434, 2006.

M. Kaczmarski, Thoughts on Intel Xeon E5-2600 v2 Product Family Performance Optimisation -component selection guidelines, 2014.

S. Mandava, B. S. Morris, S. Sah, R. M. Stevens, T. Rossin et al., Techniques for determining victim row addresses in a volatile memory, 2017.

R. P. Foundation, Raspberry pi 3 model b+, 2018.