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Co-scheduling HPC workloads on cache-partitioned CMP platforms

Abstract : Co-scheduling techniques are used to improve the throughput of applications on chip multiprocessors (CMP), but sharing resources often generates critical interferences. We focus on the interferences in the last level of cache (LLC) and use the Cache Allocation Technology (CAT) recently provided by Intel to partition the LLC and give each co-scheduled application their own cache area. We consider m iterative HPC applications running concurrently and answer the following questions: (i) how to precisely model the behavior of these applications on the cache partitioned platform? and (ii) how many cores and cache fractions should be assigned to each application to maximize the platform efficiency? Here, platform efficiency is defined as maximizing the performance either globally, or as guaranteeing a fixed ratio of iterations per second for each application. Through extensive experiments using CAT, we demonstrate the impact of cache partitioning when multiple HPC application are co-scheduled onto CMP platforms.
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Submitted on : Friday, September 14, 2018 - 9:56:11 AM
Last modification on : Friday, January 21, 2022 - 3:11:06 AM
Long-term archiving on: : Saturday, December 15, 2018 - 12:47:04 PM


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  • HAL Id : hal-01874154, version 1


Guillaume Aupy, Anne Benoit, Brice Goglin, Loïc Pottier, Yves Robert. Co-scheduling HPC workloads on cache-partitioned CMP platforms. IEEE Cluster 2018, Sep 2018, Belfast, United Kingdom. pp.335-345. ⟨hal-01874154⟩



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