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Enabling Overclocking with HLS Tools through Algorithm-Level Error Detection

Thibaut Marty 1 Tomofumi Yuki 1 Steven Derrien 1
1 CAIRN - Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources
Inria Rennes – Bretagne Atlantique , IRISA-D3 - ARCHITECTURE
Complete list of metadatas
https://hal.inria.fr/hal-01942429
Contributor : Tomofumi Yuki <>
Submitted on : Monday, December 3, 2018 - 11:16:46 AM
Last modification on : Tuesday, February 25, 2020 - 8:08:10 AM

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  • HAL Id : hal-01942429, version 1

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CNRS | UNIV-RENNES1 | CENTRALESUPELEC | IRISA | INRIA | UNIV-RENNES | UR1-UFR-ISTIC

Citation

Thibaut Marty, Tomofumi Yuki, Steven Derrien. Enabling Overclocking with HLS Tools through Algorithm-Level Error Detection. FPT 2018 - International Conference on Field-Programmable Technology, Dec 2018, Naha, Japan. ⟨hal-01942429⟩

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