From Logical Time Scheduling to Real-Time Scheduling

Frédéric Mallet 1, 2 Min Zhang 3
2 KAIROS - Logical Time for Formal Embedded System Design
CRISAM - Inria Sophia Antipolis - Méditerranée , Laboratoire I3S - COMRED - COMmunications, Réseaux, systèmes Embarqués et Distribués
Abstract : Scheduling is a central yet challenging problem in real-time embedded systems. The Clock Constraint Specification Language (CCSL) provides a formalism to specify logical constraints of events in real-time embedded systems. A prerequisite for the events is that they must be schedulable under constraints. That is, there must be a schedule which controls all events to occur infinitely often. Schedulability analysis of CCSL raises important algorithmic problems such as computational complexity and design of efficient decision procedures. In this work, we compare the scheduling problems of CCSL specifications to the real-time scheduling problem. We show how to encode a simple task model in CCSL and discuss some benefits and differences compared to more classical scheduling strategies.
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Conference papers
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https://hal.inria.fr/hal-01971976
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Submitted on : Monday, January 7, 2019 - 2:20:26 PM
Last modification on : Tuesday, January 8, 2019 - 10:07:54 AM

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  • HAL Id : hal-01971976, version 1

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Frédéric Mallet, Min Zhang. From Logical Time Scheduling to Real-Time Scheduling. 39th IEEE Real-Time Systems Symposium, Dec 2018, Nashville, United States. ⟨hal-01971976⟩

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