Constructing a Metrology Sampling Framework for In-line Inspection in Semiconductor Fabrication

Due to the shrinking IC device geometries and increasing interconnect layers, process complexity has been rapidly increasing and leads to higher manufacturing costs and longer cycle time. Thus, in-line metrology is set at various steps to inspect the wafer in real time, which often causes lots of inspection costs and also increases cycle time. This study aims to develop a framework for in-line metrology sampling to determine the optimal sampling strategy in the light of different objectives to reduce extra cost and cycle time.


INTRODUCTION
In the wafer fabrication process, a number of inspection and measurement stations are set to monitor the process parameters and to find the problems in the early stage [1]. Due to limited capacities and costs for in-line wafer inspection, only certain wafers are inspected among a specific number of lots. Considering the high inspection cost [2], an effective sampling strategy for allocating the finite capacity has always played a huge role in yield management [3]. Meanwhile, given the characteristics of the semi-conductor industry, such as short product life cycles, changing demand of customers, keen competition in the market, and high manufacturing cost, a semiconductor company should seek to cut back on unnecessary inspection cost and production time to increase the overall profit.
Although there are several existing studies for IC sampling strategy [4] in defect / particle inspection, little re-search has addressed with metrology sampling [1,5] regarding the critical dimension or thin film. In-line metrology was to inspect the WIP in real time. Even though virtual metrology becomes popular recently [6], enterprises do not trust in this technology due to its uncertainty. Currently, the sampling metrology numbers and sampling frequency are still decided via the engineers' experience, and may vary from person to person.
The purpose of this study is to develop a full decision framework for statistically determining the optimal sampling strategy for in-line inspection in wafer fabrication. Moreover, we also explored how different sampling strategies could affect the cost of quality (COQ) and conducted an empirical analysis in a semiconductor factory. The constructed model and result may effectively help the engineers to decide the optimal sampling frequency in terms of product types and the cost of quality, which could enable full utilization of the machines and improve the product yield.
The remains of this paper are organized as follows: Section 2 reviews the studies related to the fundamentals of proposed framework. Section 3 shows the proposed method. Section 4 presents an empirical study. Section 5 concludes of the developed method and discussion on further studies to deal with the complex in-line metrology sampling process.

FUNDAMENTAL
The notations used in this research are defined as follows.

 
A decision to take appropriate actions based on sample data and the probability revision is call "Bayesian decision analysis".
Bayesian decision discusses how to get extra information form appropriate sampling method, and update expected loss for feasible schemes from extra information to select a scheme with the minimum expected loss. According to Bayesian Theorem, decision makers can revise prior probability based on the sample information, and reappraise the expected value of each alternative. Chien, Hsu, Peng and Wu [4] applied Bayesian decision analysis and proposed a heuristic framework for sampling the particle or defect in wafer fabrication to provide the best sampling frequency and control limits. In addition, Chien, Wang and Wang [7] used Bayesian decision analysis to construct a IC final testing strategy for enhancing overall operational effectiveness. Figure 1 [8] shows a conceptual framework of Bayesian decision analysis.
There are three basic decision elements in Baye's decision analysis: parameter space, sample space and action space. Parameter space  is composed of possible states of . We assume that there is a set of possible actions, a jointly constituting the action space

Fig. 1. Bayesian decision analysis [8]
When  is not exactly know, we can get prior probability ) ( j   of  based on some mixture of subjective judgments and objective evidence. In many circumstances we may have some additional information provided from sample data x, with likelihood function ) (x p  obtained from an experiment whose outcomes depend on the value  . If we ignore prior information of  , sample data alone can be used for choosing the action. Let the decision rule ) (x  specify the action in A corresponding to the evidence measures the loss which arises if we take action a when the state of nature is  . Any decision rule  (.) can be assessed in terms of long-term expected loss; that is, the average loss for different data might arise. For any decision rule ) (x  , we consider the risk function as follows: If in addition to sample data, one may weigh the risk function by ) (  and compute the summary measure (e.g. expected risk) as a basis for choosing between different decision rules. That is, Baye's risk is defined as follows: The best decision rule is the one that has the minimum mean risk with respect to varia-

APPROACH
The proposed framework of sampling strategy is constructed based on Bayesian decision analysis as shown in figure 2. In particular, three Bayesian decision elements in the proposed sampling framework are defined as follows.
Parameter space is the true quality of population and comprises two states: 1=good and 2= bad since the true quality would either meet or fail quality requirement. Sample space X indicates the unqualified number in sample n drawn from population N. Action space contains two actions: = accept and = reject. Depend on decision rule (acceptance sampling plan) ) (x  , if random variable x is lower than a criteria which is determined in advance we will accept this population. Otherwise, we will reject this population.
in a lot, if the value z is less than acceptance quality level c2 we think that every wafer in the lot is meet quality requirement and accept this lot. Otherwise, if the value z exceed c2, we will reject this lot.
Because the nature state of a wafer uncertainly, and w N wafers comprise a lot, it means that the state of a lot also uncertainly. Based on nature state of a wafer or a lot, a decision making is possible to make wrong and increase the producer risk or consumer risk simultaneously. The producer risk is meant that the wafer or lot was rejected under the wafer or lot was good. The consumer risk is meant that the wafer or lot was accepted under the wafer or lot was bad.
Producer risk = p (reject a product | product is good) =  Consumer risk = p( accept a product | product is bad)=   Fig. 3 . The remaining combinations of (accept, good) and (reject, bad) imply that decision maker takes right action and no loss will occur.
According to equation (1), we derive a pair of long-term expected loss ) ), ( In addition, not all of products can be inspected. We assume the lot not inspected is good, but it may not always be true in really setting. There is a case that the lot is unqualified and we pass it because we do not inspect it. It brings a yield loss Cq from the gap between good and bad lot. For a long time, the expected yield loss of a non- With sampling frequency v, we will inspect a lot again after (v-1) lots. Between two sampling lots, the quality loss is ) ), . On the other hand, we need to consider sampling cost when sample a lot to inspect every time. Sampling cost consists of fixed sampling cost F and variant sampling cost S. If we sampled w n wafers to inspect from a lot, then the sampling cost for a sample is In order to determine the best sampling frequency v, we tradeoff sampling costs and quality cost with a function E(cost) = f ( 2 The best sampling frequency is that with the minimum E(cost).

To change the sampling inspection plan and frequency
From Figure 4, we can find that given the same number of inspected wafers w n , the greater the sampling frequency v is, the less influence inspected dies d n have on the quality loss cost. On the other hand, with the same d n , the greater v is, the less influence w n have on the quality cost loss.

CONCLUSTION AND FURTHER STUDY
This study proposed a general in-line metrology sampling framework for semiconductor manufacturing. The proposed framework can assist the decision maker in determining all parameters for in-line sampling strategy with different lot size and process capability. Moreover, the sampling acceptance level for a wafer and lot can also be decided.
However, not all in-line inspection station has the same process capability. Further study should be done to allocate the inspection resource to different inspection stations with different capability. Therefore, further studies need to decrease sampling rate at non-critical or with either stable or high process capability stations. On the other hand, increase sampling frequency at critical or low process capability stations. By the way, we can reduce cost of sampling and quality loss, decrease cycle time to increase throughputs.