Lightweight mix columns implementation for AES, Proceedings of the 9th WSEAS International Conference on Applied Informatics and Communications, pp.253-258, 2009. ,
Midori: A block cipher for low energy, Cryptology ePrint Archive, 1142. ,
Atomic-AES: A compact implementation of the AES Encryption/Decryption core, Cryptology ePrint Archive, issue.927, 2016. ,
Atomic-AES v 2.0. Cryptology ePrint Archive, 1005. ,
The SIMON and SPECK families of lightweight block ciphers, Cryptology ePrint Archive, issue.404, 2013. ,
PRESENT: An Ultra-Lightweight block cipher, the proceedings of CHES 2007, 2007. ,
PRINCE -a low-latency block cipher for pervasive computing applications (full version), Cryptology ePrint Archive, vol.529, 2012. ,
A very compact S-Box for AES, Cryptographic Hardware and Embedded Systems -CHES 2005, vol.3659, pp.441-455, 2005. ,
FPGA implementation of an optimized 8-bit AES architecture: A masked S-Box and pipelined approach, Electronics, Computing and Communication Technologies (CONECCT), 2015 IEEE International Conference on, pp.1-6, 2015. ,
The NOEKEON block cipher, 2000. ,
KATAN and KTANTANa family of small and efficient Hardware-Oriented block ciphers, Cryptographic Hardware and Embedded Systems -CHES 2009, vol.5747, pp.272-288 ,
, , 2009.
AES implementation on a grain of sand, IEE Proceedings -Information Security, vol.152, issue.1, 2005. ,
,
, , 2005.
KLEIN: A new family of lightweight block ciphers, RFID. Security and Privacy, vol.7055, pp.1-18, 2012. ,
The LED block cipher, Cryptographic Hardware and Embedded Systems -CHES 2011, vol.6917, pp.326-341, 2011. ,
Design and implementation of Low-Area and Low-Power AES encryption hardware core, 9th EUROMICRO Conference on Digital System Design (DSD'06), pp.577-583, 2006. ,
, 2012 -information technology -security techniqueslightweight cryptography -part 2: Block ciphers. Tech. rep., International Organization for Standardization, ISO/IEC: ISO/IEC 29192, 2012.
PRINTcipher: A block cipher for IC-printing, Cryptographic Hardware and Embedded Systems, CHES 2010, vol.6225, pp.16-32, 2010. ,
, The block cipher companion, 2011.
340 mV-1.1 V, 289 Gbps/W, 2090-gate nanoAES hardware accelerator with area-optimized encrypt/decrypt GF (2 4 ) 2 polynomials in 22 nm tri-gate CMOS, IEEE Journal of Solid-State Circuits, vol.50, issue.4, pp.1048-1058, 2015. ,
Pushing the limits: A very compact and a threshold implementation of AES, Advances in Cryptology -EUROCRYPT 2011, vol.6632, pp.69-88, 2011. ,
, Efficient AES implementations on ASICs and FPGAs, pp.98-112, 2005.
A compact Rijndael hardware architecture with S-Box optimization, Advances in Cryptology -ASIACRYPT, vol.2248, pp.239-254, 2001. ,
, , 2001.
Piccolo: An Ultra-Lightweight blockcipher, Cryptographic Hardware and Embedded Systems -CHES 2011, vol.6917, pp.342-357, 2011. ,
TWINE: A lightweight block cipher for multiple platforms, Selected Areas in Cryptography, vol.7707, pp.339-354, 2013. ,
Ultra-small designs for inversion-based S-Boxes, 17th Euromicro Conference on Digital System Design, pp.512-519, 2014. ,
Pushing the Limits Further: Sub-Atomic AES, 2017 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), pp.1-6, 2017. ,
URL : https://hal.archives-ouvertes.fr/hal-02319794
RECTAN-GLE: A bit-slice Ultra-Lightweight block cipher suitable for multiple platforms, Cryptology ePrint Archive, issue.084, 2014. ,