Rectification of Arithmetic Circuits with Craig Interpolants in Finite Fields

,


Introduction
The past decade has witnessed extensive investigations into formal verification of arithmetic circuits.Circuits that implement polynomial computations over large bit-vector operands are hard to verify automatically using methods such as SAT/SMT-solvers, decision diagrams, etc.Recent techniques have investigated the use of polynomial algebra and algebraic geometry techniques for their verification.These include verification of integer arithmetic circuits [1] [2] [3], integer modulo-arithmetic circuits [4], word-level RTL models of polynomial datapaths [5] [6], finite field combinational circuits [7] [8] [9], and also sequential designs [10].A common theme among the above approaches is that designs are modeled as sets of polynomials in rings with coefficients from integers Z, finite integer rings Z 2 k , finite fields F 2 k , and more recently also from the field of fractions Q.Subsequently, the verification checks are formulated using algebraic geometry [11] (e.g., the Nullstellensatz), and Gröbner basis (GB) theory and technology [12] are used as decision procedures (ideal membership test) for formal verification.
While these techniques are successful in proving correctness or detecting the presence of bugs, the task of post-verification debugging, error diagnosis and rectification of arithmetic circuits has not been satisfactorily addressed.Debugging and rectification of arithmetic circuits is of utmost importance.Arithmetic circuits are mostly custom designed; this raises the potential for errors in the implementation, which have to be eventually rectified.Instead of redesigning the whole circuit, it is desirable to synthesize rectification sub-functions with minimal topological changes to the existing design -a problem often termed as partial synthesis.Moreover, the debug, rectification and partial synthesis problem is analogous to that of synthesis for Engineering Change Orders (ECO), where the current circuit implementation should be minimally modified (rectified) to match the ECO-modified specification.The partial synthesis approach also applies here to generate ECO-patches for rectification.
The problem of debug, rectification and ECO synthesis has been addressed for control-dominated applications and random-logic circuits, where the early developments of [13] [14] [15] were extended by [16] by formulating as CNF-SAT, and computing rectification functions using Craig Interpolants [17] in propositional logic.
Craig Interpolation (CI) is a method in automated reasoning to construct and refine abstractions of functions.It is a logical tool to extract concise explanations for the infeasibility of a set of mutually inconsistent statements.As an alternative to quantifier elimination, CI finds application in verification as well as in partial synthesis -and therefore, in rectification.In propositional logic, they are defined as follows.
Definition 1.1.(Craig Interpolants) Let (A, B) be a pair of CNF formulas (sets of clauses) such that A ∧ B is unsatisfiable.Then there exists a formula I such that: (i) A =⇒ I; (ii) I ∧ B is unsatisfiable; and (iii) I refers only to the common variables of A and B, i.e.Var(I) ⊆ Var(A) ∩Var(B).The formula I is called the interpolant of (A, B).Despite these advancements in automated debugging and rectification of control and random logic circuits, the aforementioned SAT and CI-based approaches are infeasible for rectification of arithmetic circuits.

Problem Description, Objectives, and Contributions
We address the problem of rectification of buggy finite field arithmetic circuits.Our problem setup is as follows: -A specification model (Spec) is given either as a polynomial description f spec over a finite field, or as a golden model of a finite field arithmetic circuit.The finite field considered is the field of 2 k elements (denoted by F 2 k ), where k is the operandwidth (bit-vector word length).An implementation (Impl) circuit C is also given.
-Equivalence checking is performed between the Spec and the Impl circuit C, and the presence of a bug is detected.No restrictions on the number, type, or locations of the bugs are assumed.-We assume that error-diagnosis has been performed, and a subset X of the nets of the circuit is identified as potential rectification locations, called target nets.
Given the Spec, the buggy Impl circuit C, the set X of potential rectifiable locations, our objective is to determine whether or not the buggy circuit can be rectified at one particular net (location) x i ∈ X.This is called single-fix rectification in literature [16].If a single-fix rectification does exist at net x i in the buggy circuit, then our subsequent objective is to derive a polynomial function U(X PI ) in terms of the set of primary input variables X PI .This polynomial needs to be further translated (synthesized) into a logic sub-circuit such that x i = U(X PI ) acts as the rectification function for the buggy Impl circuit C so that this modified C matches the specification.
Given the above objective, this article makes the following specific contributions to solve the debug and rectification problem.
1. We formulate the test for single-fix rectifiability at a net x i using concepts and techniques from algebraic geometry [12].
-The problem is modeled in polynomial rings of the form where k corresponds to the operand-width and the variables x 1 , . . ., x n are the nets of the circuit.
-The rectification test is formulated using elimination ideals and the Weak Nullstellensatz, and solved using Gröbner basis as a decision procedure.2. If rectification is feasible at x i , then we compute a rectification function x i = U(X PI ).
-We show that the rectification function U(X PI ) can be determined based on the concept of Craig interpolants in algebraic geometry.While Craig interpolation is a well-studied concept in propositional and first-order logic theories, to the best of our knowledge, it has not been investigated in algebraic geometry.
-We define Craig interpolants in polynomial algebra in finite fields and prove their existence.We also show how to compute such an interpolant using Gröbner bases.3. The rectification function U(X PI ) obtained using Craig interpolants is a polynomial in F 2 k [x 1 , . . ., x n ].We subsequently show how a logic circuit can be obtained from this polynomial.4. We use Gröbner basis not only as a decision procedure for the rectification test, but also as a quantification procedure for computing the rectification function.Computation of Gröbner bases exhibits very high complexity.To make our approach scalable, we further show how to exploit the topological structure of the given circuit to improve this computation.
We demonstrate the application of our techniques to rectify finite field arithmetic circuits with large operand sizes, where conventional SAT-solver based rectification approaches are infeasible.
The paper is organized as follows.The following section reviews previous work in automated diagnosis and rectification, and recent applications of Craig interpolants.Section 3 describes concepts from computer algebra and algebraic geometry.Section 4 describes an equivalence checking framework using the Weak Nullstellensatz over finite fields.Section 5 presents results that ascertain the single-fix rectifiability of the circuit.Section 6 introduces Craig interpolants in finite fields using Gröbner basis methods, and gives a procedure for obtaining the rectification function through algebraic interpolants.Section 7 addresses improvements to the Gröbner basis computation.Section 8 presents our experimental results and Section 9 concludes the paper.

Review of Previous Work
Automated diagnosis and rectification of digital circuits has been addressed in [13] [18].The paper [14] presents algorithms for synthesizing Engineering Change Order (ECO) patches.The partial equivalence checking problem has been addressed in [15][19] that checks whether a partial implementation can be extended to a complete design so that it becomes equivalent to a given specification.The partial implementation comprises black-boxes for which some functions f i 's need to be computed.The problem is formulated as Quantified Boolean Formula (QBF) solving: does there exist a function f i , such that for all primary input assignments, the Impl circuit is equivalent to the Spec circuit.Incremental SAT-solving based approach has been presented in [20] in lieu of solving the QBF problem.This approach has been extended in [21] [22] to generate rectification functions when the Impl circuit topology is fixed.The use of Craig interpolation as an alternative to quantifier elimination has been presented in [16][23] [24] for ECO applications.The single-fix rectification function approach in [23] has been extended in [16] to generate multiple partial-fix functions.Recently, an efficient approach on resource aware ECO patch generation has been presented in [25].
As these approaches are SAT based, they work well for random logic circuits but are not efficient for arithmetic circuits.In contrast, this article presents a word-level formulation for single-fix rectification using algebraic geometry techniques.Computer algebra has been utilized for circuit debugging and rectification in [27], [28], [29].These approaches rely heavily on the structure of the circuit for debugging, and in general, are incomplete.If the arithmetic circuit contains redundancies, the approach may not identify the buggy gate, nor compute the rectification function.On the other hand, our approach is complete, as it can always compute a single-fix rectification function, if one exists.Although our polynomial algebra based approach is applicable to any circuit in general, it is more efficient and practical for finite field arithmetic circuits.
The concept of Craig interpolants has been extensively investigated in many first order theories for various applications in synthesis and verification.Given the pair (A, B) of two mutually inconsistent formulas (cf.Def.1.1) and a proof of their unsatisfiability, a procedure called the interpolation system constructs the interpolant in linear time and space in the size of the proof [30].As the abilities of SAT solvers for proof refutation have improved, interpolants have been exploited as abstractions in various problems that can be formulated as unsatisfiable instances, e.g.model checking [30], logic synthesis [31], etc.Their use as abstractions have also been replicated in other (combinations of) theories [32] [33] [34] [35], etc.However, the problem has been insufficiently investigated over polynomial ideals in finite fields from an algebraic geometry perspective.In that regard, the works that come closest to ours are by Gao et al. [36] and [37].While they do not address the interpolation problem per se, they do describe important results of Nullstellensatz, projections of varieties and quantifier elimination over finite fields that we utilize to develop the theory and algorithms for our approach.Moreover, prior to debugging, our approach requires that verification be performed to detect the presence of a bug.For this purpose, we make use of techniques presented in [38] [7] [8].
We have described the notion of Craig interpolants in finite fields in our work [26].This article is an extended version of that work where we formally define Craig interpolants in finite fields and prove their existence.Moreover, we describe a procedure for computing an interpolant and prove that the computed interpolant is the smallest.The computation of interpolants uses Gröbner basis based algorithms which have high computational complexity.In contrast to [26], we further propose an efficient approach to compute interpolants based on the given circuit topology.

Preliminaries: Notation and Background Results
Let F q denote the finite field of q elements where q = 2 k , F q be its algebraic closure, and k is the operand width.The field where F 2 = {0, 1}, and P(x) is a primitive polynomial of degree k.Let α be a primitive element of F 2 k , so that P(α) = 0. Let R = F q [x 1 , . . ., x n ] be the polynomial ring in n variables x 1 , . . ., x n , with coefficients from F q .A monomial is a power product of variables , where where c 1 , . . ., c t are coefficients and X 1 , . . ., X t are monomials.A monomial order > (or a term order) is imposed on the ring -i.e. a total order and a well-order on all the monomials of R s.t.multiplication with another monomial preserves the order.Then the monomials of all polynomials and lc( f ) = c 1 are called the leading monomial, leading term, and leading coefficient of f , respectively.In this work, we employ lexicographic (lex) term orders (see Definition 1.4.3 in [12]).
Polynomial reduction via division: Let f , g be polynomials.If lm( f ) is divisible by lm(g), then we say that f is reducible to r modulo g, denoted f g −→ r, where r = f − lt( f ) lt(g) • g.This operation forms the core operation of polynomial division algorithms and it has the effect of canceling the leading term of f .Similarly, f can be reduced w.r.t. a set of polynomials F = { f 1 , . . ., f s } to obtain a remainder r.This reduction is denoted as f F −→ + r, and the remainder r has the property that no term in r is divisible (i.e.cannot be canceled) by the leading term of any polynomial f i in F.
We model the given circuit C by a set of multivariate polynomials f 1 , . . ., f s ∈ F 2 k [x 1 , . . ., x n ]; here x 1 , . . ., x n denote the nets (signals) of the circuit.Every Boolean logic gate of C is represented by a polynomial in F 2 , as The polynomials f 1 , . . ., f s form the basis or the generators of J.
Let a a a = (a 1 , . . ., a n ) ∈ F n q be a point in the affine space, and f a polynomial in R. If f (a a a) = 0, we say that f vanishes on a a a.In verification, we have to analyze the set of all common zeros of the polynomials of F that lie within the field F q .In other words, we need to analyze solutions to the system of polynomial equations This zero set is called the variety.It depends not just on the given set of polynomials but rather on the ideal generated by them.We denote it by V(J) = V( f 1 , . . ., f s ), and it is defined as follows: We denote the complement of a variety, F n q \V(J), by V(J).The Weak Nullstellensatz: To ascertain whether V (J) = / 0, we employ the Weak Nullstellensatz over F q , for which we use the following notations.Definition 3.3.(Sum and Product of Ideals) Given two ideals J 1 = f 1 , . . ., f s , J 2 = h 1 , . . ., h r , their sum and product are Ideals and varieties are dual concepts: For all elements α ∈ F q , α q = α.Therefore, the polynomial x q − x vanishes everywhere in F q , and is called the vanishing polynomial of the field.Let J 0 = x q 1 − x 1 , . . ., x q n − x n be the ideal of all vanishing polynomials in R. Then the variety of ideal J 0 is the entire affine space, i.e.V (J 0 ) = F n q .Moreover, by extending any ideal J ∈ R = F q [x 1 , . . ., x n ] by the ideal of all vanishing polynomials in R, the variety is restricted to points within F n q , i.e.V (J + J 0 ) ⊂ F n q .
For a finite field F q and the ring R = F q [x 1 , . . ., x n ], let J = f 1 , . . ., f s ⊆ R, and let To determine whether V (J) = / 0, we need to test whether or not the unit element 1 is a member of the ideal J + J 0 .For this ideal membership test, we need to compute a Gröbner basis of J + J 0 .
Gröbner basis of ideals: An ideal may have many different sets of generators: . ., g t .Given a non-zero ideal J, a Gröbner basis (GB) for J is one such set G = {g 1 , . . ., g t } that possesses important properties that allow to solve many polynomial decision problems.Definition 3.4 (Gröbner basis [12]).For a monomial ordering >, a set of non-zero polynomials G = {g 1 , g 2 , . . ., g t } contained in an ideal J, is called a Gröbner basis of J iff ∀ f ∈ J, f = 0, there exists g i ∈ {g 1 , . . ., g t } such that lm(g i ) divides lm( f Then J = G holds and so G = GB(J) forms a basis for J. Buchberger's algorithm [39] is used to compute a Gröbner basis.The algorithm, shown in Alg. 1, takes as input the set of polynomial F = { f 1 , . . ., f s } and computes their Gröbner basis G = {g 1 , . . ., g t } such that J = F = G , where the variety where L = LCM(lm( f i ), lm( f j )).

Algorithm 1 Buchberger's Algorithm
Require: A GB may contain redundant polynomials, and it can be reduced to eliminate these redundant polynomials from the basis.A reduced GB is a canonical representation of the ideal.Moreover, when 1 If so, the generators of ideal J do not have any common zeros in F n q .Craig interpolation: The Weak Nullstellensatz is the polynomial analog of SAT checking.For UNSAT problems, the formal logic and verification communities have explored the notion of abstraction of functions by means of Craig interpolants, which has been applied to circuit rectification [16].
Given the pair (A, B) and their refutation proof, a procedure called the interpolation system constructs the interpolant in linear time and space in the size of the proof [30].We introduce the notion of Craig interpolants in polynomial algebra over finite fields, based on the results of the Nullstellensatz.We make use of the following definitions and theorems for describing the results on Craig interpolants in finite fields.Definition 3.5.Given an ideal J ⊂ R and V (J) ⊆ F n q , the ideal of polynomials that vanish on V (J) is Definition 3.6.For any ideal J ⊂ R, the radical of J is defined as When J = √ J, then J is called a radical ideal.Over algebraically closed fields, the Strong Nullstellensatz establishes the correspondence between radical ideals and varieties.Over finite fields, it has a special form.Lemma 3.1.(From [36]) For an arbitrary ideal J ⊂ F q [x 1 , . . ., x n ], and Theorem 3.2 (The Strong Nullstellensatz over finite fields (Theorem 3.2 in [36])).For any ideal Theorem 3.3 (Elimination Theorem (from Theorem 2.3.4 [12])).Given an ideal J ⊂ R and its GB G w.r.t. the lexicographical (lex) order on the variables where , then for every 0 ≤ l ≤ n we denote by G l the GB of l-th elimination ideal of J and compute it as: J l is called the l-th elimination ideal as it eliminates the first l variables from J.
Example 3.1.(from [11]) Consider polynomials f 1 : Definition 3.8.Given an ideal J = f 1 , . . ., f s ⊂ R and its variety V (J) ⊂ F n q , the l-th projection of V (J) denoted as Pr l (V (J)) is the mapping In a general setting, the projection of a variety is a subset of the variety of an elimination ideal: Pr l (V (J)) ⊆ V (J l ).However, operating over finite fields, when the ideals contain the vanishing polynomials, then the above set inclusion turns into an equality.Lemma 3.2 (Lemma 3.4 in [36]).Given an ideal J ⊂ R that contains the vanishing polynomials of the field, then Pr l (V (J)) = V (J l ), i.e. the l-th projection of the variety of ideal J is equal to the variety of its l-th elimination ideal.

Algebraic Miter for Equivalence Checking
Given f spec as the Spec polynomial and an Impl circuit C, we need to construct an algebraic miter between f spec and C. For equivalence checking, we need to prove that the miter is infeasible.Fig. 1 depicts how a word-level algebraic miter is setup.Suppose that A = {a 0 , . . ., a k−1 } and Z = {z 0 . . ., z k−1 } denote the k-bit primary inputs and outputs of the finite field circuit, respectively.Then A = ∑ k−1 i=0 a i α i , Z = ∑ k−1 i=0 z i α i correspond to polynomials that relate the word-level and bit-level inputs and outputs of C.Here α is the primitive element of F 2 k .Let Z S be the word-level output for f spec , which computes some polynomial function F (A) of A, so that f spec : Z S + F (A).The word-level outputs Z, Z S are mitered to check if for all inputs, Z = Z S is infeasible.

Specification Polynomial
Circuit Implementation C

Word-Level Miter
Fig. 1: Word-Level Miter The logic gates of C are modeled as the set of polynomials F = { f 1 , . . ., f s } according to Eqn. (1).In finite fields, the disequality Z = Z S can be modeled as a single polynomial f m , called the miter polynomial, where f m = t • (Z − Z S ) − 1, and t is introduced as a free variable.
a solution as (t,t −1 ) are multiplicative inverses of each other.Thus the miter becomes feasible.
Corresponding to the miter, we construct the ideal J = f spec , f 1 , . . ., f s , f m .In our formulation, we need to also include the ideal J 0 corresponding to the vanishing polynomials in variables Z, Z s , A,t, and x i ; here Z, Z s , A,t are the word-level variables that take values in F 2 k , and x i corresponds to the bit level (Boolean) variables in the miter.In fact, it was shown in [7] that in J 0 it is sufficient to include vanishing polynomials for only the primary input bits (x i ∈ X PI ).Therefore, In this way, equivalence checking using the algebraic model is solved as follows: Construct an ideal J = f spec , f 1 , . . ., f s , f m , as described above.Add to it the ideal 0, the miter is infeasible, and C implements f spec .If V (J + J 0 ) = / 0, the miter is feasible, and there exists a bug in the design.Consider a modulo multiplier with output Z and inputs A, B. The Spec polynomial is given as f spec : Z + A • B (mod P(X)), where P(X) is a primitive polynomial of the field.An implementation of such a multiplier with operand (Z, A, B) bit-width = 2 is shown in Fig. 2(a).Now let's say that the designer has introduced a bug, and the XOR gate with output net r 0 has been replaced with an AND gate in the actual implementation in the circuit of Fig. 2(b).The polynomials for the gates of the correct circuit implementation are, whereas for the buggy implementation, the polynomial f 5 is f 5 : r 0 + c 1 c 2 .The problem is modeled over F 4 and let α be a primitive element of F 4 .The word-level polynomials are f 8 : Z + z 0 + z 1 α, f 9 : A + a 0 + a 1 α, and f 10 : B + b 0 + b 1 α.The specification polynomial is f spec : Z s + AB.We create a miter polynomial against this specification as f m : t(Z − Z s ) − 1.
To perform equivalence checking of the correct implementation and the specification polynomial, we construct ideal J = f spec , f 1 , . . ., f 5 , . . ., f 10 , f m .Computing GB of J + J 0 (J 0 is the ideal of vanishing polynomials) results in {1}, implying the the circuit in Fig. 2(a) is equivalent to the specification.However, computing GB of the ideal J + J 0 where J = f spec , f 1 , . . ., f 5 , . . ., f 10 , f m results in a set of polynomials G = {g 1 , . . ., g t } = {1}, implying the presence of a bug(s) in the design.

Formulating the Rectification Check
Equivalence checking is performed between the Spec and Impl circuit C, and it reveals the presence of a bug in the design.Post-verification, we assume that error diagnosis has been performed, and a set of nets X has been identified as potential single-fix rectifiable locations.While the nets in X might be target nets for single-fix, the circuit may or may not be rectifiable at any x i ∈ X.We have to first ascertain that the circuit is indeed single-fix rectifiable at some x i ∈ X, and subsequently compute a rectification function U(X PI ), so that x i = U(X PI ) rectifies the circuit at that net.

Single Fix Rectification
Using the Weak Nullstellensatz (Theorem 3.1), we formulate the test for rectifiability of C at a net x i in the circuit.For this purpose, we state and prove the following result, which is utilized later.
Proposition 5.1.Given two ideals J 1 and J 2 over some finite field such that V (J 1 ) ∩ V (J 2 ) = / 0, there exists a polynomial U which satisfies Proof.Over finite fields F q , V (J 1 ) and V (J 2 ) are finite sets of points.Every finite set of points is a variety of some ideal.Therefore, given V (J 1 ) ∩ V (J 2 ) = / 0, there exists a set of points (a variety) which contains V (J 1 ), and which does not intersect with V (J 2 ).Let this variety be denoted by V (J I ), where J I is the corresponding ideal.Then V (J 1 ) ⊆ V (J I ) ⊆ V (J 2 ).In addition, we can construct a polynomial U that vanishes exactly on the points in V (J I ) by means of the Lagrange's interpolation formula.
We now present the result that ascertains the circuit's rectifiability at a target net.Let the net x i ∈ X (i.e.i th gate) be the rectification target, and a possible rectification function be x i = U(X PI ).Then the i th gate is represented by a polynomial f i : x i + U(X PI ).Consider the ideal J corresponding to the algebraic miter -the polynomials f 1 , . . ., f i , . . ., f s representing the gates of the circuit, the specification polynomial f spec , and the miter polynomial f m : The following theorem checks whether the circuit is indeed single-fix rectifiable at the net x i .
Theorem 5.1.Construct two ideals: to be the respective elimination ideals, where all the non-primary input variables have been eliminated.Then the circuit can be single-fix rectified at net x i with the polynomial function Proof.We will first prove the if case of the theorem.Assume 1 The subscript X PI in V X PI denotes that the variety is being considered over X PI variables, as the non-primary inputs have been eliminated from E L and E H . Using Proposition 5.1, we can find a polynomial U(X PI ) such that, Note, however, that since V X PI (E L ),V X PI (E H ) are considered over only primary input bits, they contain points from . Therefore, there exists a polynomial U(X PI ) as in Eqn.(3) with coefficients only in F 2 .
Let us consider a point p p p in V (J).Point p p p is an assignment to every variable in J such that all the generators of J are satisfied.We denote by a a a, the projection of p p p on the primary inputs (i.e. the primary input assignments under p p p).There are only two possibilities for U(X PI ), 1. U(a a a) = 1, or in other words a a a ∈ V X PI (U(X PI )).It also implies that the value of x i under p p p must be 1 because x i +U(X PI ) = 0 needs to be satisfied.Since the generator f i of J L also forces x i to be 1 and all other generators are exactly the same as those of J, p p p is also a point in V (J L ).Moreover, E L is the elimination ideal of J L , and therefore, a a a ∈ V X PI (E L ).But this a contradiction to our assumption that V X PI (E L ) ⊆ V X PI (U(X PI )) and such a point a a a (and p p p) does not exist.2. U(a a a) = 0, or in other words a a a ∈ V X PI (U(X PI )).Using similar argument as the previous case, we can show that a a a ∈ V X PI (E H ).This is again a contradiction to our assumption In conclusion, there exists no point in V (J) (or the miter is infeasible) when U(X PI ) satisfies Eqn. 3, and therefore, circuit can be rectified at x i .Now we will prove the only if direction of the proof.We show that if 1 ∈ E L + E H , then there exists no polynomial U(X PI ) that can rectify the circuit.If 1 ∈ E L + E H , then E L and E H have a common zero.Let a a a be a point in V X PI (E L ) and V X PI (E H ).This point can be extended to some points p p p and p p p in V (J L ) and V (J H ), respectively.Notice that in point p p p the value of x i will be 1, and in p p p x i will be 0. Any polynomial U(X PI ) will either evaluate to 0 or 1 for the assignment a a a to the primary inputs.If it evaluates to 1, then we can say that p p p is in V (J) as f i in J forces x i = 1 and all other generators of J and J L are same.This implies that f m (p p p ) = 0 ( f m : miter polynomial is feasible) and this choice of U(X PI ) will not rectify the circuit.If U(X PI ) evaluates to 0, then p p p is a point in V (J).
Therefore, no choice of U(X PI ) can rectify the circuit if 1 ∈ E L + E H . Example 5.1.Consider the buggy modulo multiplier circuit of Fig. 2(b) (reproduced in Fig. 3), where the gate output r 0 should have been the output of an XOR gate, but an AND gate is incorrectly implemented.We apply Thm.5.1 to check for single-fix rectifiability at r 0 .The polynomials for the gates of the correct circuit implementation are,

Fig. 3: A buggy 2-bit modulo multiplier circuit
The problem is modeled over F 4 and let α be a primitive element of F 4 .The wordlevel polynomials are f 8 : Z + z 0 + z 1 α, f 9 : A + a 0 + a 1 α, and f 10 : B + b 0 + b 1 α.The specification polynomial is f spec : Z s + AB.We create a miter polynomial against this specification as f m : t(Z − Z s ) − 1.
The ideals J L and J H are constructed as: The ideal J 0 is: and the corresponding ideals E L and E H are computed to be: Computing a Gröbner basis G of E L + E H results in G = {1}.Therefore, we can rectify this circuit at r 0 .On the other hand, if we apply the rectification theorem at net c 2 , the respective ideals E L and E H are as follows, When we compute G = GB(E L + E H ), we obtain G = {1} indicating that single-fix rectification is not possible at net c 2 , for the given bug.

Craig Interpolants in Finite Fields
Once it is ascertained that a net x i admits single-fix rectification, the subsequent task is to compute a rectification polynomial function x i = U(X PI ) in terms of the primary inputs of the circuit.In this section, we describe how such a rectification polynomial function can be computed.For this purpose, we introduce the concept of Craig interpolants using algebraic geometry in finite fields.We describe the setup for Craig interpolation in the ring R = F q [x 1 , . . ., x n ].Partition the variables {x 1 , . . ., x n } into disjoint subsets A, B,C.We are given two ideals J A ⊂ F q [A,C], J B ⊂ F q [B,C] such that the C-variables are common to the generators of both J A , J B .From here on, we will assume that all ideals include the corresponding vanishing polynomials.For example, generators of J A include A A A q q q − − − A A A, , ,C C C q q q − − − C C C, where A A A q q q − − − A A A = {x q i − x i : x i ∈ A}, and so on.Then these ideals become radicals and we can apply Lemmas 3.1 and 3.2.We use V A,C (J A ) to denote the variety of J A over the F q -space spanned by A and C variables, i.e.
and suppose that it is found by application of the Weak Nullstellensatz (Thm.3.1) that V A,B,C (J) = / 0. When we compare the varieties of J A and J B , then we can consider the varieties in With this setup, we define the interpolants as follows.
Definition 6.1 (Interpolants in finite fields).Given two ideals J A ⊂ F q [A,C] and J B ⊂ F q [B,C] where A, B,C denote the three disjoint sets of variables such that V A,B,C (J A ) ∩ V A,B,C (J B ) = / 0. Then there exists an ideal J I satisfying the following properties: We call V A,B,C (J I ) the interpolant in finite fields of the pair (V A,B,C (J A ),V A,B,C (J B )), and the corresponding ideal J I the ideal-interpolant.
As the generators of J I contain only the C-variables, the interpolant V A,B,C (J I ) is of the form V A,B,C (J I ) = F A q ×F B q ×V C (J I ).Therefore, the subscripts A, B for the interpolant V A,B,C (J I ) may be dropped for the ease of readability.
where J 0,A,C and J 0,B,C are the corresponding ideals of vanishing polynomials.Then, Ideals J A , J B have no common zeros as V A,B,C (J A ) ∩V A,B,C (J B ) = / 0. The pair (J A , J B ) admits a total of 8 interpolants:  It is easy to check that all V (J I ) satisfy the 3 conditions of Def.6.1.Note also that V (J S ) is the smallest interpolant, contained in every other interpolant.Likewise, V (J L ) contains all other interpolants and it is the largest.The other containment relationships are shown in the corresponding interpolant lattice in Fig. 4 Theorem 6.1.(Existence of Craig Interpolants) An ideal-interpolant J I , and correspondingly the interpolant V A,B,C (J I ), as given in Def.6.1, always exists.
Proof.Consider the elimination ideal J I = J A ∩ F q [C].We show J I satisfies the three conditions for the interpolant.Condition 1: V A,B,C (J I ) ⊇ V A,B,C (J A ).This condition is trivially satisfied due to construction of elimination ideals.As J I ⊆ J A , V A,B,C (J I ) ⊇ V A,B,C (J A ). Condition 2: V A,B,C (J I ) ∩ V A,B,C (J B ) = / 0. This condition can be equivalently stated as V B,C (J I ) ∩ V B,C (J B ) = / 0 as neither J I nor J B contain any variables from the set A. We prove this condition by contradiction.Let's assume that there exists a common point (b, c) in V B,C (J I ) and V B,C (J B ).We know that the projection of the variety Pr A (V A,C (J A )) is equal to the variety of the elimination ideal V C (J I ), where J I = J A ∩ F q [C], due to Lemma 3.2.Therefore, the point (c) in the variety of J I can be extended to a point (a, c) in the variety of J A .This implies that the ideals J A and J B vanish at (a, b, c).This is a contradiction to our initial assumption that the intersection of the varieties of J A and J B is empty.Thus J I , J B have no common zeros.Condition 3: The generators of J I contain only the C-variables.This condition is trivially satisfied as J I is the elimination ideal obtained by eliminating A-variables in J A .
The above theorem not only proves the existence of an interpolant, but also gives a procedure to construct its ideal: In other words, compute a reduced Gröbner basis G of J A w.r.t. the elimination order A > B > C and take Then G I gives the generators for the ideal-interpolant J I .
Example 6.2.The elimination ideal J I computed for J A from Example 6.1 is J I = J S = cd, b + d + 1 with variety V C (J I ) = (bcd) : {001, 100, 110}.This variety over the variable set A and C is V A,C (J I ) = (abcd) : {0001, 0100, 0110, 1001, 1100, 1110}, and it contains V A,C (J A ).Moreover, V A,B,C (J I ) also has an empty intersection with V A,B,C (J B ). Theorem 6.2.(Smallest interpolant) The interpolant V A,B,C (J S ) corresponding to the ideal J S = J A ∩ F q [C] is the smallest interpolant.
Proof.Let J I ⊆ F q [C] be any another ideal-interpolant = J S .We show that V C (J S ) ⊆ V C (J I ).For V C (J I ) to be an interpolant it must satisfy which, due to Theorem 3.2, is equivalent to As the generators of J I only contain polynomials in C-variables, this relation also holds for the following

Computing a Rectification Function from Craig Interpolants
Back to our formulation of single-fix rectification, from Thm. 5.1 we have 1 0. Therefore, we can consider the pair (E L , E H ) for Craig interpolation.In other words, based on the notation from Def. 6.1, J A = E L and J B = E H .Moreover, E L and E H are elimination ideals containing only X PI variables.As a result, the partitioned set of variables for Craig interpolation A, B, and C all correspond to primary inputs.Furthermore, we want to compute an ideal Therefore, we use E L to compute the correction function U(X PI ).
Obtaining U(X PI ) from E L : In finite fields, given an ideal J, it always possible to find a polynomial U such that V (U) = V (J).The reason is that every ideal in a finite field has a finite variety, and a polynomial with those points as its roots can always be constructed using the Lagrangian interpolation formula.We construct the rectification polynomial U from the ideal-interpolant E L as shown below, such that V (E L ) = V (U).
Let the generators of E L be denoted by g 1 , . . ., g t .We can compute U as, It is easy to assert that Conversely, for a point a a a ∈ V (E L ), at least one of g 1 , . . ., g t will evaluate to 1. Without loss of generality, if g 1 evaluates to 1 at a a a , then Using Eqn.(4), a recursive procedure is derived to compute U, and it is depicted in Algorithm 2. At every recursive step, we also reduce the intermediate results by (mod J 0 ) (line 7) so as to avoid terms of high degree.In this fashion, from the idealinterpolant E L , we compute the single-fix rectification polynomial function U(X PI ), and synthesize a sub-circuit at net x i such that x i = U(X PI ) rectifies the circuit.
poly S 1 = compute U(subsetJ, J 0 ) Example 6.3.Example 5.1 showed that the buggy circuit of Fig. 3 can be rectified at net r 0 .This rectification check required the computation of the (Gröbner basis of) ideal E L .Using Alg. 2, we compute U(X PI ) from E L to be a 0 b 1 + a 1 b 0 , and the rectification polynomial as r 0 + a 0 b 1 + a 1 b 0 .This can be synthesized into a sub-circuit as r 0 = (a 0 ∧ b 1 ) ⊕ (a 1 ∧ b 0 ), by replacing the modulo 2 product and sum in the polynomial with the Boolean AND and XOR operators, respectively.

Efficient Gröbner basis computations for E L and E H
The proposed rectification approach requires the computation of (generators of) elimination ideals E L and E H .This is achieved by computing a Gröbner basis each for respectively.The rectification polynomial function x i = U(X PI ) is subsequently derived from the generators of E L .As the generators of J L and J H comprise polynomials derived from the entire circuit, these GB-computations become infeasible for larger circuits due to its high complexity.In [37], it was shown that the time and space complexity of computing GB(J + J 0 ) over F q [x 1 , . . ., x n ] is bounded by q O(n) .In the context of our work, as q = 2 k where k is the operand-width, and n the number of variables (nets) in the miter, we have to overcome this complexity to make our approach practical for large circuits.
Prior work [8] has shown that the GB-computation can be significantly improved when the polynomials are derived from circuits.By analyzing the topology of the given circuit, a specialized term order can be derived that can significantly reduce the number of Spoly computations in the GB-algorithm.We present a similar approach to improve the GB-computation for ideals E L , E H . Lemma 7.1 (Product Criterion [40]).For two polynomials f i , f j in any polynomial ring R, if the equality lm( f i ) • lm( f j ) = LCM(lm( f i ), lm( f j )) holds, i.e. if lm( f i ) and lm( f j ) are relatively prime, then Spoly( f i , f j ) Buchberger's algorithm therefore does not pair those polynomials f i , f j (Alg. 1, line 4) whose leading monomials are relatively prime, as they do not produce any new information in the basis.Moreover, based on the above criterion, when the leading monomials of all polynomials in the basis F = { f 1 , . . ., f s } are relatively prime, then all Spoly( f i , f j ) G − → + 0. As no new polynomials are generated in Buchberger's algorithm, F already constitutes a Gröbner basis (F = GB(J)).For a combinational circuit C, a specialized term order > can always be derived by analyzing the circuit topology which ensures such a property [4] [7]: Proposition 7.1 ((From [7])).Let C be an arbitrary combinational circuit.Let {x 1 , . . ., x n } denote the set of all variables (signals) in C. Starting from the primary outputs, perform a reverse topological traversal of the circuit and order the variables such that x i > x j if x i appears earlier in the reverse topological order.Impose a lex term order > to represent each gate as a polynomial f i , s.t.f i = x i + tail( f i ).Then the set of all polynomials { f 1 , . . ., f s } forms a Gröbner basis G, as lt( f i ) = x i and lt( f j ) = x j for i = j are relatively prime.This term order > is called the Reverse Topological Term Order (RTTO).
RTTO ensures that the set of all polynomials { f 1 , . . ., f s } of the given circuit C have relatively prime leading terms.However, the model of the algebraic miter (Fig. 1, with the Spec and the miter polynomial, in addition to the given circuit) is such that under RTTO >, not all polynomials have relatively prime leading terms.However, we show that imposition of RTTO on the miter still significantly reduces the amount of computation required for Gröbner bases.We demonstrate the technique on the GB computation for the ideal J L + J 0 (analogously also for J H + J 0 ), corresponding to the miter, as per Thm.5.1.
Given the word-level miter of Fig. 1, impose a lexicographic (lex) monomial order on the ring R, with the following variable order: Here t is the free variable used in the miter polynomial, and Z, Z s are the word-level outputs of Impl and Spec, respectively, and A is the word-level input.Corresponding to the circuit in Fig. 3 (Example 5.1), we use a lex term order with variable order: The polynomials { f 1 , . . ., f 10 , f spec , f m } in Example 5.1 are already written according to the term order of Eqn.(6).Note also that the leading terms of the generators of the ideal J L are the same as the leading terms of polynomials in { f 1 , . . ., f 10 , f spec , f m }.From among these, the only pair of polynomials that do not have relatively prime leading terms are f 8 and f m .This condition also holds when considering the ideal J L + J 0 (instead of only J L ) as J 0 is composed of only bit-level primary input variables.
In general, modeling an algebraic miter with RTTO > will ensure that we have exactly one pair of polynomials with leading monomials that are not relatively prime.This pair includes: i) the miter polynomial f m : tZ −tZ s −1, with lm( f m ) = tZ; and ii) the polynomial (hereafter denoted by f o ) that relates the word-level and bit-level variables of the circuit, Therefore, in the first iteration of Alg. 1 for computing GB(J L + J 0 ), the only critical pair to compute is Spoly( f m , f o ), as all other pairs reduce to 0, due to Lemma 7.1.Moreover, computing Once again, RTTO > ensures the following: where r is a polynomial in bit-level primary input variables.
Proof.Consider the polynomial reduction of Spoly( f m , f o ) where f spec = Z S + F (A).The remainder for this reduction will be where F (A) is the polynomial specification in word-level input variable(s).This remainder is then reduced by the polynomial relating the word-level and bit-level primary input variables, i.e. by A + a 0 + where the word-level specification polynomial F (A) gets reduced to a polynomial expression G(a 0 , . . ., a k−1 ) in primary input bits.Due to RTTO >, subsequent divisions of the above remainder in Eqn.(7) by { f 1 , . . ., f s } will successively cancel the terms in variables z i , i = 0, . . ., k − 1, and express them in terms of the primary input bits.Since primary input bits are last in RTTO >, they never appear as leading terms in any of the polynomials in J L ; so the terms in primary input bits cannot be canceled.As a result, after complete reduction of Spoly( f m , f o ) by J L +J 0 , the remainder will be a polynomial expression of the form Spoly( f m , f o ) where r is a polynomial only in bit-level primary input variables.
Coming back to the computation GB(J L + J 0 ), the polynomial h is now added to the current basis, i.e.G = {J L +J 0 }∪{h} in Buchberger's algorithm (Line 7 in Alg. 1).This polynomial h now needs to be paired with other polynomials in the basis.There are only two sets of possibilities for subsequent critical pairings: i) the pair Spoly( f m , h); and ii) to pair h with corresponding vanishing polynomials from the ideal J 0 .For all other polynomials f i ∈ { f 1 , . . ., f s }, lm(h) and lm( f i ) have relatively prime leading terms, so Spoly(h, f i ) i=1,...,s J L +J 0 − −− → + 0; so the pairs (h, f i ) need not be considered in GB(J L + J 0 ).
From Lemma 7.2 and its proof, we have that h = t •r +1 and Z +Z S G={J L +J 0 } − −−−−−− → + = r, with r composed of primary input bits.Let r = e + r , where e = lt(r) is the leading term and r = r − e is tail(r), both expressed in primary input bits.With this notation, h = te + tr + 1 and lt(h) = te.The LCM L of leading monomials of f m and h is L = LCM(lm( f m ), lm(h)) = LCM(tZ,te) = tZe.Consider the computation Spoly( f m , h): J L +J 0 − −− → + h, and pair h with polynomials of J 0 , as all other Spoly(h, f i ) reduce to 0. This gives us the following procedure to compute the Gröbner basis of E L (respectively E H ): is the only pair of polynomials in J L + J 0 that do not have relatively prime leading monomials.2. Use Buchberger's algorithm to compute GB of the set of vanishing polynomials and h, i.e. compute G = GB(J 0 = {x The same technique is also used to compute E H by replacing J L with J H in the above procedure.In our approach, we use the above procedures to compute E L , E H for Thm.5.1 and then compute U(X PI ) from E L using Alg. 2.

Experimental Results
We have performed rectification experiments on finite field arithmetic circuits that are used in cryptography, where the implementation is different from the specification due to exactly one gate.This is to ensure that single-fix rectification is feasible for such bugs, so that a rectification function can be computed.We have implemented the procedures described in the previous sections -i.e. the concepts of Thm.5.1, Section 7 and Alg. 2 -using the SINGULAR symbolic algebra computation system [ver.4-1-0] [41].Given a Spec, a buggy Impl circuit C, and the set X of rectification targets, our approach checks for each net x i ∈ X if single-fix rectification is feasible, and if so, computes a rectification function x i = U(X PI ).The experiments were conducted on a desktop computer with a 3.5GHz Intel Core TM i7-4770K Quad-core CPU, 16 GB RAM, running 64-bit Linux OS.
Experiments are performed with three different types of finite field circuit benchmarks.Two of these are the Mastrovito and the Montgomery multiplier circuit architectures used for modular multiplication.Mastrovito multipliers compute Z = A × B (mod P(x)) where P(x) is a given primitive polynomial for the datapath size k.Montgomery multipliers are instead preferred for exponentiation operations (often required in cryptosystems).The last set of benchmarks are circuits implementing point addition over elliptic curves used for encryption, decryption and authentication in elliptic curve cryptography (ECC).First we present the results for the case where the reference Spec is given as a Montgomery multiplier, and the buggy implementation is given as a Mastrovito multiplier, which is to be rectified.Thm.5.1, along with efficient GB-computation of the ideals E L , E H , is applied at a net x i ∈ X, such that the circuit is rectifiable at x i .Table 1 compares the execution time for the SAT-based approach of [16] against ours (Thm.5.1) for checking whether a buggy Mastrovito multiplier can be rectified at a certain location in the circuit against a Montgomery multiplier specification.The SAT procedure is implemented using the abc tool [42].We execute the command inter on the ON set and OFF set as described in [16].The SAT-based procedure is unable to perform the necessary unsatisfiability check for circuits beyond 9-bit operand word-lengths, whereas our approach easily scales to 32-bit circuits.Using our approach, the polynomial U(X PI ) needed for rectification is computed from E L and the time is reported in Table 1 in the Alg. 2 column.The last column in the table shows the memory usage of our approach.
We also perform the rectification when the Spec is given as a polynomial expression instead of a circuit.Table 2 shows the results for checking whether the incorrect Mastrovito implementation can be single-fix rectified against the word-level specification polynomial f spec : Z S + A • B. Point addition is an important operation required for the task of encryption, decryption and authentication in ECC.Modern approaches represent the points in projective coordinate systems, e.g., the L ópez-Dahab (LD) projective coordinate [43], due to which the operations can be implemented as polynomials in the field.
Each of the polynomials in the above design are implemented as (gate-level) logic blocks and are interconnected to obtain final outputs X 3 ,Y 3 and Z 3 .Table 3 shows the results for the block that computes D = B 2 • (C + aZ 2 1 ).Our approach can rectify up to 64-bit circuits.
Limitations of our approach: We also performed experiments where we apply Thm.5.1 at a gate output which cannot rectify the circuit.We used the Montgomery multiplier as the specification and a Mastrovito multiplier as the implementation.For 4-and 8-bit word-lengths, the execution time of our approach was comparable to that of the SAT-based approach, and was ∼ 0.1 seconds.For the 16-bit multipliers, the SAT-based approach completed in 0.11 seconds.On the other hand, application of Thm.5.1 resulted in a memory explosion and consumed ∼ 30 GB of memory within 5-6 minutes.This is due to the fact that when 1 ∈ E L + E H , then GB(E L + E H ) is not equal to {1} and the Gröbner basis algorithm produces a very large output.To improve our approach we are working on term ordering heuristics so that our approach can perform efficiently in both cases.We also wish to employ other data-structures better suited to circuits, as SINGULAR's data structure is not very memory efficient.SINGULAR also has an upper limit on the number of variables (32,768) that can be accommodated in the system, limiting application to larger circuits.

Conclusion
This paper considers single-fix rectification of arithmetic circuits.The approach is applied after formal verification detects the presence of a bug in the design.We assume that post-verification debugging has been performed a set (X) of nets is provided as rectification targets.The paper presents necessary and sufficient conditions that ascertains whether a buggy circuit can be single-fix rectified at a net x i ∈ X.When single-fix rectification is feasible, we compute a rectification polynomial function x i = U(X PI ), which can be synthesized into a circuit.For this purpose, the paper introduces the notion of Craig interpolants in algebraic geometry in finite fields, proves their existence, and gives an effective procedure for their computation.Furthermore, we show how the rectification polynomial can be computed from algebraic interpolants.Experiments are performed over various finite field arithmetic circuits that show the efficiency of our approach as against SAT-based approaches.Limitations of our approach are also analyzed.We are currently investigating the extension of our approach to multi-fix rectification.

Table 2 :
Mastrovito multiplier rectification against polynomial specification Z S = AB.Time in seconds; Time-out = 5400s; k: Operand width

Table 3 :
Point Addition circuit rectification against polynomial specification D = B 2 • (C + aZ 2 1 ).Time in seconds; Time-out = 5400s; k: Operand width Consider point addition in L ópez-Dahab (LD) projective coordinate.Given an elliptic curve: Y2 + XY Z = X 3 Z + aX 2 Z 2 + bZ 4 over F 2 k ,where X,Y, Z are k-bit vectors that are elements in F 2 k and similarly, a, b are constants from the field.We represent point addition over the elliptic curve as (X 3 , Y 3 , Z 3 ) = (X 1 , Y 1 , Z 1 ) + (X 2 , Y 2 , 1).Then X 3 , Y 3 , Z 3 can be computed as follows: