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Run-time Coarse-Grained Hardware Mitigation for Multiple Faults on VLIW Processors

Rafail Psiakis 1 Angeliki Kritikakou 1 Olivier Sentieys 1 Emmanuel Casseau 1
1 CAIRN - Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources
Inria Rennes – Bretagne Atlantique , IRISA-D3 - ARCHITECTURE
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https://hal.inria.fr/hal-02344282
Contributor : Emmanuel Casseau Connect in order to contact the contributor
Submitted on : Monday, November 4, 2019 - 9:02:19 AM
Last modification on : Thursday, November 4, 2021 - 10:54:02 AM
Long-term archiving on: : Wednesday, February 5, 2020 - 7:30:20 PM

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  • HAL Id : hal-02344282, version 1

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Rafail Psiakis, Angeliki Kritikakou, Olivier Sentieys, Emmanuel Casseau. Run-time Coarse-Grained Hardware Mitigation for Multiple Faults on VLIW Processors. DASIP 2019 - Conference on Design and Architectures for Signal and Image Processing, Oct 2019, Montréal, Canada. pp.1-6. ⟨hal-02344282⟩

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