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What You Simulate Is What You Synthesize: Design of a RISC-V Core from C++ Specifications

Simon Rokicki 1 Davide Pala 1 Joseph Paturel 1 Olivier Sentieys 1
1 CAIRN - Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources
Inria Rennes – Bretagne Atlantique , IRISA-D3 - ARCHITECTURE
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https://hal.inria.fr/hal-02394911
Contributor : Olivier Sentieys <>
Submitted on : Thursday, December 5, 2019 - 10:04:50 AM
Last modification on : Friday, July 10, 2020 - 4:01:34 PM
Document(s) archivé(s) le : Friday, March 6, 2020 - 1:58:53 PM

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  • HAL Id : hal-02394911, version 1

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Simon Rokicki, Davide Pala, Joseph Paturel, Olivier Sentieys. What You Simulate Is What You Synthesize: Design of a RISC-V Core from C++ Specifications. RISC-V Workshop 2019, Jun 2019, Zurich, Switzerland. pp.1-2. ⟨hal-02394911⟩

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