What You Simulate Is What You Synthesize: Design of a RISC-V Core from C++ Specifications

Computer Science [cs] Embedded Systems Computer Science [cs] Hardware Architecture [cs.AR] Computer Science [cs] Computer Arithmetic Engineering Sciences [physics] Signal and Image processing

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Submitted on : Thursday, December 5, 2019-10:04:50 AM

Last modification on : Saturday, August 6, 2022-3:33:10 AM

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hal-02394911 , version 1 (05-12-2019)

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HAL Id : hal-02394911 , version 1

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Simon Rokicki, Davide Pala, Joseph Paturel, Olivier Sentieys. What You Simulate Is What You Synthesize: Design of a RISC-V Core from C++ Specifications. RISC-V Workshop 2019, Jun 2019, Zurich, Switzerland. pp.1-2. ⟨hal-02394911⟩

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