L. Anghel and M. Nicolaidis, Cost Reduction and Evaluation of a Temporary Faults-Detecting Technique, Design, Automation, and Test in Europe, pp.423-438, 2008.
URL : https://hal.archives-ouvertes.fr/hal-00013756

J. Balasch, B. Gierlichs, and I. Verbauwhede, An In-Depth and Black-Box Characterization of the Effects of Clock Glitches on 8-bit MCUs, Workshop on Fault Diagnosis and Tolerance in Cryptography, 2011.

H. Bar-el, H. Choukri, D. Naccache, M. Tunstall, and C. Whelan, The Sorcerer's Apprentice Guide to Fault Attacks, Proceedings of the IEEE, vol.94, issue.2, pp.370-382, 2006.

A. Barenghi, L. Breveglieri, I. Koren, G. Pelosi, and F. Regazzoni, Countermeasures Against Fault Attacks on Software Implemented AES: Effectiveness and Cost, 5th Workshop on Embedded Systems Security, 2010.

T. Barry, D. Couroussé, and B. Robisson, Compilation of a Countermeasure Against Instruction-Skip Fault Attacks, Proceedings of the Third Workshop on Cryptography and Security in Computing Systems, pp.1-6, 2016.
URL : https://hal.archives-ouvertes.fr/cea-01296572

N. Belleville, D. Couroussé, K. Heydemann, and H. Charles, Automated Software Protection for the Masses Against Side-Channel Attacks, ACM Trans. Archit. Code Optim, vol.15, issue.4, 2018.
URL : https://hal.archives-ouvertes.fr/hal-01927625

S. Bhasin, N. Selmane, S. Guilley, and J. Danger, Security Evaluation of Different AES Implementations Against Practical Setup Time Violation Attacks in FPGAs, IEEE International Workshop on Hardware-Oriented Security and Trust, pp.15-21, 2009.

N. Binkert, B. Beckmann, G. Black, K. Steven, A. Reinhardt et al., Somayeh Sardashti, et al. The gem5 simulator, ACM SIGARCH computer architecture news, vol.39, issue.2, pp.1-7, 2011.

C. Bozzato, R. Focardi, and F. Palmarini, Shaping the Glitch: Optimizing Voltage Fault Injection Attacks, IACR Transactions on Cryptographic Hardware and Embedded Systems, pp.199-224, 2019.

E. Buchanan, R. Roemer, H. Shacham, and S. Savage, When Good Instructions go Bad: Generalizing Return-Oriented Programming to RISC, Proceedings of the 15th ACM conference on Computer and communications security, pp.27-38, 2008.

K. Sebanjila, R. Bukasa, J. Lashermes, A. Lanet, and . Legay, Let's Shock Our IoT's Heart: ARMv7-M Under (Fault) Attacks, Proceedings of the 13th International Conference on Availability, Reliability and Security, vol.33, pp.1-33, 2018.

A. Butko, R. Garibotti, L. Ost, and G. Sassatelli, Accuracy Evaluation of gem5 Simulator System, 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), pp.1-7, 2012.

L. Cojocar, Kostas Papagiannopoulos, and Niek Timmers. Instruction Duplication: Leaky and not Too Fault-Tolerant! In International Conference on Smart Card Research and Advanced Applications, pp.160-179, 2017.

M. Cook, Universality in Elementary Cellular Automata, Complex Systems, p.15, 2004.

M. Cook, A Concrete View of Rule 110 Computation, Electronic Proceedings in Theoretical Computer Science, vol.1, pp.31-55, 2009.

L. Davi, C. Liebchen, A. Sadeghi, K. Z. Snow, and F. Monrose, Isomeron: Code Randomization Resilient to (Just-In-Time) Return-Oriented Programming, NDSS, 2015.

C. Deng, S. Kedar, and . Namjoshi, Securing a Compiler Transformation, Formal Methods in System Design, vol.53, issue.2, pp.166-188, 2018.

S. Dolan,

E. Dottax, C. Giraud, M. Rivain, and Y. Sierra, On Second-Order Fault Analysis Resistance for CRT-RSA Implementations, IFIP International Workshop on Information Security Theory and Practices, pp.68-83, 2009.

S. Endo, N. Homma, Y. Hayashi, J. Takahashi, H. Fuji et al., A Multiple-Fault Injection Attack by Adaptive Timing Control Under Black-Box Conditions and a Countermeasure, International Workshop on Constructive Side-Channel Analysis and Secure Design, 2014.

S. Endo, Y. Li, N. Homma, K. Sakiyama, K. Ohta et al., An Efficient Countermeasure Against Fault Sensitivity Analysis Using Configurable Delay Blocks, Workshop on Fault Diagnosis and Tolerance in Cryptography, pp.95-102, 2012.

H. Chong, J. Kim, and . Quisquater, Fault Attacks for CRT Based RSA: New Attacks, New Results and New Countermeasures, Proceedings of the 1st IFIP International Conference on Information Security Theory and Practices: Smart Cards, Mobile and Ubiquitous Computing Systems, WISTP'07, pp.215-228, 2007.

H. Chong, J. Kim, and . Quisquater, New Differential Fault Analysis on AES Key Schedule: Two Faults are Enough, International Conference on Smart Card Research and Advanced Applications, pp.48-60, 2008.

F. Majéric, E. Bourbao, and L. Bossuet, Electromagnetic Security Tests for SoC, 2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2016.

N. Moro, A. Dehbaoui, and K. Heydemann, Electromagnetic Fault Injection: Towards a Fault Model on a 32-bit Microcontroller, Workshop on Fault Diagnosis and Tolerance in Cryptography, pp.77-88, 2013.
URL : https://hal.archives-ouvertes.fr/emse-00871218

N. Moro, K. Heydemann, E. Encrenaz, and B. Robisson, Formal Verification of a Software Countermeasure Against Instruction Skip Attacks, Journal of Cryptographic Engineering, vol.4, issue.3, pp.145-156, 2014.
URL : https://hal.archives-ouvertes.fr/emse-00869509

N. Oh, P. Philip, E. Shirvani, and . Mccluskey, Error Detection by Duplicated Instructions in Super-Scalar Processors, IEEE Transactions on Reliability, vol.51, issue.1, pp.63-75, 2002.

J. Proy, K. Heydemann, A. Berzati, and A. Cohen, Compiler-Assisted Loop Hardening Against Fault Attacks. ACM Trans. Archit. Code Optim, vol.14, issue.4, 2017.

J. Proy, K. Heydemann, A. Berzati, F. Majeric, and A. Cohen, A First ISA-Level Characterization of EM Pulse Effects on Superscalar Microarchitectures, ARES 2019 -14th International Conference on Availability, Reliability and Security, vol.7, pp.1-7, 2019.
URL : https://hal.archives-ouvertes.fr/hal-02373088

G. A. Reis, J. Chang, N. Vachharajani, R. Rangan, and D. I. August, SWIFT: Software Implemented Fault Tolerance, International Symposium on Code Generation and Optimization, 2005.

L. Riviere, Z. Najm, P. Rauzy, J. Danger, J. Bringer et al., High Precision Fault Injections on the Instruction Cache of ARMv7-M Architectures, 2015 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), pp.62-67, 2015.
URL : https://hal.archives-ouvertes.fr/hal-01208378

H. Shacham, The Geometry of Innocent Flesh on the Bone: Return-into-libc Without Function Calls (on the x86), Proceedings of the 14th ACM conference on Computer and communications security, pp.552-561, 2007.

P. Sergei, R. Skorobogatov, and . Anderson, Optical Fault Induction Attacks, International workshop on cryptographic hardware and embedded systems, pp.2-12, 2002.

J. Takahashi, T. Fukunaga, and K. Yamakoshi, DFA Mechanism on the AES Key Schedule, Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC 2007), pp.62-74, 2007.

N. Timmers, A. Spruyt, and M. Witteman, Controlling PC on ARM Using Fault Injection, Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC), pp.25-35, 2016.

E. Trichina and R. Korkikyan, Multi Fault Laser Attacks on Protected CRT-RSA, Workshop on Fault Diagnosis and Tolerance in Cryptography, pp.75-86, 2010.

. Bilgiday-yuce, H. Nahid-farhady-ghalaty, C. Santapuri, C. Deshpande, P. Patrick et al., Software Fault Resistance is Futile: Effective Single-Glitch Attacks, Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC), pp.47-58, 2016.

L. Zussa, A. Dehbaoui, K. Tobich, J. Dutertre, P. Maurine et al., Efficiency of a Glitch Detector Against Electromagnetic Fault Injection, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), pp.1-6, 2014.
URL : https://hal.archives-ouvertes.fr/lirmm-01096047

L. Zussa, J. Dutertre, J. Clédiere, B. Robisson, and A. Tria, Investigation of Timing Constraints Violation as a Fault Injection Means, 27th Conference on Design of Circuits and Integrated Systems (DCIS), p.11, 2012.
URL : https://hal.archives-ouvertes.fr/emse-00742652