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Understanding microarchitectural effects on the performance of parallel applications

Carsten Bruns 1 Sid Touati 1
1 KAIROS - Logical Time for Formal Embedded System Design
Laboratoire I3S - COMRED - COMmunications, Réseaux, systèmes Embarqués et Distribués, CRISAM - Inria Sophia Antipolis - Méditerranée
Abstract : Since several years, classical multiprocessor systems have evolved to multicores, which tightly integrate multiple CPU cores on a single die or package. This technological shift leads to sharing of microarchitectural resources between the individual cores, which has direct implications on the performance of parallel applications. It consequently makes understanding and tuning these significantly harder, besides the already complex issues of parallel programming. In this work, we empirically analyze various microarchitectural effects on the performance of parallel applications, through repeatable experiments. We show their importance, besides the effects described by Amdahl's law and synchronization or communication considerations. In addition to the classification of shared resources into storage and bandwidth resources of Abel et al. [1], we view the physical temperature and power budget also as a shared resource. Dynamic Voltage and Frequency Scaling (DVFS) over a wide range is needed to meet these constraints in multicores, thus it is a very important factor for performance nowadays. Our work aims to gain a better understanding of performance-limiting factors in high performance multicores, it shall serve as a basis to avoid them and to find solutions to tune parallel applications.
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Contributor : Sid Touati <>
Submitted on : Monday, April 12, 2021 - 10:30:09 AM
Last modification on : Tuesday, April 13, 2021 - 3:30:51 AM


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  • HAL Id : hal-03195799, version 1



Carsten Bruns, Sid Touati. Understanding microarchitectural effects on the performance of parallel applications. The 2020 International Conference on High Performance Computing & Simulation, Mar 2021, Virtual, Spain. ⟨hal-03195799⟩



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