Skip to Main content Skip to Navigation
New interface
Journal articles

A fast vectorized sorting implementation based on the ARM scalable vector extension (SVE)

Bérenger Bramas 1, 2 
1 CAMUS - Compilation pour les Architectures MUlti-coeurS
Inria Nancy - Grand Est, ICube - Laboratoire des sciences de l'ingénieur, de l'informatique et de l'imagerie
Abstract : The way developers implement their algorithms and how these implementations behave on modern CPUs are governed by the design and organization of these. The vectorization units (SIMD) are among the few CPUs' parts that can and must be explicitly controlled. In the HPC community, the x86 CPUs and their vectorization instruction sets were de-facto the standard for decades. Each new release of an instruction set was usually a doubling of the vector length coupled with new operations. Each generation was pushing for adapting and improving previous implementations. The release of the ARM scalable vector extension (SVE) changed things radically for several reasons. First, we expect ARM processors to equip many supercomputers in the next years. Second, SVE's interface is different in several aspects from the x86 extensions as it provides different instructions, uses a predicate to control most operations, and has a vector size that is only known at execution time. Therefore, using SVE opens new challenges on how to adapt algorithms including the ones that are already well-optimized on x86. In this paper, we port a hybrid sort based on the wellknown Quicksort and Bitonic-sort algorithms. We use a Bitonic sort to process small partitions/arrays and a vectorized partitioning implementation to divide the partitions. We explain how we use the predicates and how we manage the non-static vector size. We also explain how we efficiently implement the sorting kernels. Our approach only needs an array of O(logN) for the recursive calls in the partitioning phase, both in the sequential and in the parallel case. We test the performance of our approach on a modern ARMv8.2 (A64FX) CPU and assess the different layers of our implementation by sorting/partitioning integers, double floating-point numbers, and key/value pairs of integers. Our results show that our approach is faster than the GNU C++ sort algorithm by a speedup factor of 4 on average.
Complete list of metadata

https://hal.inria.fr/hal-03227631
Contributor : Bérenger Bramas Connect in order to contact the contributor
Submitted on : Friday, November 19, 2021 - 1:33:05 PM
Last modification on : Tuesday, October 25, 2022 - 4:17:46 PM

File

peerj-cs-769.pdf
Publication funded by an institution

Identifiers

Citation

Bérenger Bramas. A fast vectorized sorting implementation based on the ARM scalable vector extension (SVE). PeerJ Computer Science, 2021, ⟨10.7717/peerj-cs.769⟩. ⟨hal-03227631v2⟩

Share

Metrics

Record views

187

Files downloads

759