Skip to Main content Skip to Navigation
New interface
Conference papers

Faster floating-point square root for integer processors

Claude-Pierre Jeannerod 1 Hervé Knochel 2 Christophe Monat 2 Guillaume Revy 1 
1 ARENAIRE - Computer arithmetic
Inria Grenoble - Rhône-Alpes, LIP - Laboratoire de l'Informatique du Parallélisme
2 Compilation Expertise Center
ST-GRENOBLE - STMicroelectronics [Grenoble]
Abstract : This paper presents some work in progress on fast and accurate floating-point arithmetic software for ST200-based embedded systems. We show how to use some key architectural features to design codes that achieve correct rounding-to-nearest without sacrificing for efficiency. This is illustrated with the square root function, whose implementation given here is faster by over 35% than the previously best one for such systems.
Complete list of metadata
Contributor : Claude-Pierre Jeannerod Connect in order to contact the contributor
Submitted on : Wednesday, November 10, 2021 - 12:33:57 PM
Last modification on : Tuesday, October 25, 2022 - 4:18:21 PM
Long-term archiving on: : Friday, February 11, 2022 - 6:46:14 PM


Files produced by the author(s)




Claude-Pierre Jeannerod, Hervé Knochel, Christophe Monat, Guillaume Revy. Faster floating-point square root for integer processors. 2007 International Symposium on Industrial Embedded Systems, Jul 2007, Lisbon, Portugal. pp.324-327, ⟨10.1109/SIES.2007.4297353⟩. ⟨hal-03424131⟩



Record views


Files downloads