Abstract : This report presents a simple hardware architecture for computing the seed values for reciprocal and square root reciprocal. These seeds are used in the initialization of floating-point division and square root software iterations. The proposed solution is based on polynomial approximation with specific coefficients and a table lookup. The obtained architectures lead to small and fast circuits.
https://hal.inria.fr/inria-00070298 Contributor : Rapport de Recherche InriaConnect in order to contact the contributor Submitted on : Friday, May 19, 2006 - 7:57:50 PM Last modification on : Friday, February 4, 2022 - 3:14:40 AM Long-term archiving on: : Sunday, April 4, 2010 - 8:52:21 PM