UML2 as an ADL Hierarchichal Hardware Modeling

Arnaud Cuccuru 1 Philippe Marquet 1 Jean-Luc Dekeyser 1
1 DART - Contributions of the Data parallelism to real time
LIFL - Laboratoire d'Informatique Fondamentale de Lille, Inria Lille - Nord Europe
Abstract : Taking into account the hardware architecture specificities is a crucial step in the development of an efficient application. This is particularly the case for embedded systems where constraints are strong (real-time) and resources limited (computing, power). This approach is called co-design, and it is found more or less explicitly in ADLs (Architecture Description Languages). Many works have been done around co-design and ADLs, but no standard notation and semantics have emerged. Concerning software engineering, UML has become a recognized standard language for modeling, proving the need of users for common syntax and vocabulary to specify their applications. We believe that it would useful to use the well achieved syntax and vocabulary of UML for both applications and hardware architectures, that is to say using UML as an ADL. Our approach consists in a clear specialization of an UML subset via a the proposition of a generic profile that allows the definition of precise semantic and syntaxic rules. The generic profile can then be extended to suit the need of the user. To illustrate our subject, we give a refinement example of the profile to get relevant informations for a simulation at the TML level (Transaction Level Modeling). The modeling of the TI OMAP2410 and OMAP2420 is provided as an example.
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  • HAL Id : inria-00071423, version 1


Arnaud Cuccuru, Philippe Marquet, Jean-Luc Dekeyser. UML2 as an ADL Hierarchichal Hardware Modeling. [Research Report] RR-5166, INRIA. 2004. ⟨inria-00071423⟩



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