Combining Light Static Code Annotation and Instruction-Set Emulation for Flexible and Efficient On-the-fly Simulation

Thierry Lafage 1 André Seznec 1
1 CAPS - Compilation, parallel architectures and system
IRISA - Institut de Recherche en Informatique et Systèmes Aléatoires, Inria Rennes – Bretagne Atlantique
Abstract : Computer architects rely on on-the-fly simulation for designing microprocessor- s. However, these simulations cannot use large workloads consuming several CPU hours since, using current software approaches, even skipping instructions, is very time consuming. This paper proposes a new cost effective trace collection and on-the-fly simulation approach. The original application code is lightly annotated to provide a fast (direct) execution mode. An embedded instruction-set emulator enables trace collection or on-the-fly simulations. At run time, dynamic switches are enabled from the fast mode to the emulation mode by the annotation code, and vice-versa. The instrumentat- ion tool, calvin2, and the instruction-set emulator, DICE, presented in this paper, exhibit low execution slowdowns (from 1.01 to 3.09) on the SPEC95 benchmarks running in fast mode. Such low execution slowdowns make it possible to use samples spread over a long running application for simulations. We compare our approach with the dynamic translation approach used in Shade. While our DICE emulator is not optimized for raw performance, our system will outperform dynamic translation provided that only a small part of the application execution is effectively simulated.
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Rapport
[Research Report] RR-3821, INRIA. 1999
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https://hal.inria.fr/inria-00072837
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Soumis le : mercredi 24 mai 2006 - 11:04:20
Dernière modification le : jeudi 11 janvier 2018 - 06:20:08
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Thierry Lafage, André Seznec. Combining Light Static Code Annotation and Instruction-Set Emulation for Flexible and Efficient On-the-fly Simulation. [Research Report] RR-3821, INRIA. 1999. 〈inria-00072837〉

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