Scheduling Block-Cyclic Array Redistribution

Abstract : This article is devoted to the run-time redistribution of arrays that are distributed in a block-cyclic fashion over a multidimensional processor grid. While previous studies have concentrated on efficiently generating the communication messages to be exchanged by the processors involved in the redistribution, we focus on the {\em scheduling} of those messages: how to organize the message exchanges into «structured» communication steps that minimize contention. We build upon results of Walker and Otto, who solved a particular instance of the problem, and we derive an optimal scheduling for the most general case, namely, moving from a {\tt CYCLIC(r)} distribution on a $P$-processor grid to a {\tt CYCLIC(s)} distribution on a $Q$-processor grid, for {\em arbitrary} values of the redistribution parameters $P$, $Q$, $r$, and $s$.
Type de document :
Rapport
[Research Report] RR-3117, INRIA. 1997
Liste complète des métadonnées

https://hal.inria.fr/inria-00073573
Contributeur : Rapport de Recherche Inria <>
Soumis le : mercredi 24 mai 2006 - 13:12:37
Dernière modification le : mardi 16 janvier 2018 - 15:43:12
Document(s) archivé(s) le : dimanche 4 avril 2010 - 22:02:56

Fichiers

Identifiants

  • HAL Id : inria-00073573, version 1

Collections

Citation

Frédéric Desprez, Jack Dongarra, Antoine Petitet, Cyril Randriamaro, Yves Robert. Scheduling Block-Cyclic Array Redistribution. [Research Report] RR-3117, INRIA. 1997. 〈inria-00073573〉

Partager

Métriques

Consultations de la notice

252

Téléchargements de fichiers

271